STULPI01A datasheet(37/44 Pages) STMICROELECTRONICS

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STULPI01A - STULPI01B

ULPI registers

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Table 23.

USB interrupt latch register

Address: 14h (Read-only with auto clear)

(These bits are set by the STULPI01 when an unmasked change occurs on the corresponding internal

signal. The STULPI01 will automatically clear all bits when the link reads this register, or when low power

mode is entered. The STULPI01 also clears this register when serial mode or car kit mode is entered

regardless of the value of ClockSuspendM. The interrupt circuitry is powered down in any mode when

both rising and falling edge enables are disabled. To ensure the interrupts are detectable when the clock

is powered down, the link should enable both rising and falling edges.

The STULPI01 follows the rules in Table 20 for setting any latch register bit. It is important to note that if

the register read data is returned to the Link in the same cycle that a USB interrupt latch bit is to be set,

the interrupt condition is given immediately in the register read data and the latch bit is not set.

Note that it is optional for the link to read the USB interrupt latch register in synchronous mode because

the RX CMD byte already indicates the interrupt source directly.)

Field name

Bits

Access

Reset

Description

Host disconnect

latch

0rd