L6566ATR datasheet(29/51 Pages) STMICROELECTRONICS

29 / 51 page

L6566A

Application information

29/51

Experience shows that this value is typically lower than the real one. Once the maximum

peak primary current, IPKpmax, occurring at minimum input voltage Vinmin has been found,

the value of Rs can be determined from (2):

Equation 7

The converter is then tested on the bench to find the output power level Poutlim where

regulation is lost (because overcurrent is being tripped) both at Vin = Vinmin and

Vin = Vinmax.

If Poutlim @ Vinmax > Poutlim @ Vinmin the system is still undercompensated and k needs

increasing; if Poutlim @ Vinmax < Poutlim @ Vinmin the system is overcompensated and k

needs decreasing. This will go on until the difference between the two values is acceptably

low. Once found the true kopt in this way, it is possible that Poutlim turns out slightly different

from the target; to correct this, the sense resistor Rs needs adjusting and the above tuning

process will be repeated with the new Rs value. Typically a satisfactory setting is achieved in

no more than a couple of iterations.

In applications where this function is not wanted, e.g. because the PFC stage regulates at a

fixed voltage, the VFF pin can be simply grounded, directly or through a resistor (see

“Chapter 5.11: OVP block on page 35”). The overcurrent setpoint will be then fixed at the

maximum value of 1 V. If a lower setpoint is desired to reduce the power dissipation on Rs,

the pin can be also biased at a fixed voltage using a divider from VREF (pin 10).

If the FF option is selected the Line Feedforward function can be still used to compensate for

the total propagation delay Td of the current sense chain (internal propagation delay td(H-L)

plus the turn-off delay of the external MOSFET), which in standard current mode PWM

controllers is done by adding an offset on the current sense pin proportional to the input

voltage. In that case the divider ratio k, which will be much smaller as compared to that used

with the QR option selected, can be calculated with the following equation:

max

PKp

min

opt

−

Figure 17.

Left: overcurrent setpoint vs VFF voltage; right: line feedforward function block

Vcsx [V]

0.5

11.5

22.5

33.5

0.2

0.4

0.6

0.8

1.2

VVFF [V]

VCOMP= Upper clamp

PFC Output Bus

DRIVER

R1B

COMP

VFF

L6566A

1.5 V

Hiccup

DISABLE

VOLTAGE

FEED

FORWARD

To PFC's OV

sensing

Optional for

OVP settings

OCP

PWM

Vcsx

Clock/ZCD

R1A

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