DC to 500 MHz,

Dual Digital Gain Trim Amplifier

Preliminary Technical Data

AD8366

Rev. PrC

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FEATURES

Matched Pair of Differential Digitally-Controlled VGAs

Gain Range: 4.5 dB to 20.5 dB

Step 0.25 dB

Operating frequency

DC to 500MHz

800MHz 3-dB bandwidth

NF 10.5 dB @ max. gain, 18dB @ min. gain at 10MHz

OIP3 36dBVrms at 10MHz

HD2, HD3 > 88dBc for 2Vpp output at 10MHz at max gain

Differential Input and Output

Adjustable output common-mode

Optional DC output offset correction

Serial/Parallel Port Programmable

Power-down Feature

Single 5V Supply Operation

APPLICATIONS

Baseband I/Q receivers

Diversity receivers

ADC drivers

W-CDMA/CDMA/CDMA2000/GSM

Point-to-(Multi)Point Radio

CATV

Wireless local loop

WiMax

FUNCTIONAL BLOCK DIAGRAM

DC OFFSET

CANCELLATION

CHANNEL

GAIN

CONTROL

B4

B3

B2

B1

B0

Ch. B Data Enable

Serial /

Parallel

AD8366

IAN

IAP

VCMA

VCMB

OAN

OAP

IBP

IBN

OBP

OBN

B5

DC OFFSET

CANCELLATION

Ch. A Data Enable

Figure 1. Functional Block Diagram

GENERAL DESCRIPTION

The AD8366 is a matched pair of fully differential low-noise

and low-distortion digitally programmable variable gain

amplifiers. The gain of each amplifier can be programmed

separately or simultaneously over a range of 5 dB to 21 dB in

steps of 0.25 dB. The amplifier offers flat frequency

performance and group delay from DC out to 150 MHz,

independent of gain code.

The AD8366 offers excellent spurious-free dynamic range,

suitable for driving 12-bit ADCs. The NF at max gain is 10.5 dB

at 10 MHz and increases 2dB for every 4dB decrease in gain.

Over the entire gain range, the HD3 and HD2 are >88dBc for

2 V p-p at the output at 10 MHz into 500 Ω. The 2-tone

intermodulation distortion of -90dBc into 200 Ω translates to

an OIP3 of 43 dBm. The differential input impedance is 200 Ω

to provide a well-defined termination. The differential output is

voltage-mode with a low impedance of 30 Ω.

programmed via pins VCMA and VCMB over a range of

voltages. The built-in DC-offset compensation loop can be

disabled if DC-coupled operation is desired. The high-pass

corner is defined by external capacitors on pins OFSA and

be driven from 1.2V to 3.4V.

The digital interface allows for parallel or serial gain

programming. The AD8366 operates off a 4.5V to 5.5V supply

and consumes a supply current of 175mA. When disabled, it

consumes ~ 4mA. The AD8366 is fabricated using Analog

Devices’ advanced Silicon-Germanium bipolar process and is

available in a 32-lead exposed paddle LFCSP package.

range.