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MPC8640DEC Arkusz danych(PDF) 113 Page - Freescale Semiconductor, Inc |
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MPC8640DEC Arkusz danych(HTML) 113 Page - Freescale Semiconductor, Inc |
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113 / 140 page ![]() MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 1 Freescale Semiconductor 113 Thermal 19.2 Thermal Management Information This section provides thermal management information for the high coefficient of thermal expansion (HCTE) package for air-cooled applications. Proper thermal control design is primarily dependent on the system-level design—the heat sink, airflow, and thermal interface material. The MPC8640 implements several features designed to assist with thermal management, including the temperature diode. The temperature diode allows an external device to monitor the die temperature in order to detect excessive temperature conditions and alert the system; see Section 19.2.4, “Temperature Diode,” for more information. To reduce the die-junction temperature, heat sinks are required; due to the potential large mass of the heat sink, attachment through the printed-circuit board is suggested. In any implementation of a heat sink solution, the force on the die should not exceed ten pounds force (45 newtons). Figure 59 and Figure 52 show a spring clip through the board. Occasionally the spring clip is attached to soldered hooks or to a plastic backing structure. Screw and spring arrangements are also frequently used. Table 70. Package Thermal Characteristics1 Characteristic Symbol Value Unit Notes Junction-to-ambient thermal resistance, natural convection, single-layer (1s) board RθJA 18 °C/W 1, 2 Junction-to-ambient thermal resistance, natural convection, four-layer (2s2p) board RθJA 13 °C/W 1, 3 Junction-to-ambient thermal resistance, 200 ft/min airflow, single-layer (1s) board RθJMA 13 °C/W 1, 3 Junction-to-ambient thermal resistance, 200 ft/min airflow, four-layer (2s2p) board RθJMA 9°C/W 1, 3 Junction-to-board thermal resistance RθJB 5°C/W 4 Junction-to-case thermal resistance RθJC < 0.1 °C/W 5 Notes: 1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance. 2. Per JEDEC JESD51-2 with the single-layer board (JESD51-3) horizontal. 3. Per JEDEC JESD51-6 with the board (JESD51-7) horizontal. 4. Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on the top surface of the board near the package. 5. This is the thermal resistance between die and case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1) with the calculated case temperature. Actual thermal resistance is less than 0.1 °C/W. |
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