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SN74ACT3631PCB Arkusz danych(PDF) 18 Page - Texas Instruments |
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SN74ACT3631PCB Arkusz danych(HTML) 18 Page - Texas Instruments |
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18 / 26 page ![]() SN74ACT3631 512 × 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS246G – AUGUST 1993 – REVISED APRIL 1998 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 FIFO Filled to First Retransmit Word CLKA IR tsu(EN) th(EN) RTM tsk(1)† CLKB tpd(C-IR) 12 One or More Write Locations Available † tsk(1) is the minimum time between a rising CLKB edge and a rising CLKA edge for IR to transition high in the next CLKA cycle. If the time between the rising CLKB edge and rising CLKA edge is less than tsk(1), then IR can transition high one CLKA cycle later than shown. Figure 12. IR Timing From the End of Retransmit Mode When One or More Write Locations Are Available CLKA AF tsu(EN) th(EN) RTM tsk(2)‡ (512 – Y) or More Words Past First Retransmit Word CLKB tpd(C-AE) 12 (Y + 1) or More Write Locations Available ‡ tsk(2) is the minimum time between a rising CLKB edge and a rising CLKA edge for AF to transition high in the next CLKA cycle. If the time between the rising CLKB edge and rising CLKA edge is less than tsk(2), then AF can transition high one CLKA cycle later than shown. NOTE A: Y is the value loaded in the AF flag offset register. Figure 13. AF Timing From the End of Retransmit Mode When (Y + 1) or More Write Locations Are Available |
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