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STIEC45-26AS Arkusz danych(PDF) 5 Page - STMicroelectronics |
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STIEC45-26AS Arkusz danych(HTML) 5 Page - STMicroelectronics |
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5 / 9 page ![]() STIEC45-XXAS Characteristics Doc ID 16871 Rev 1 5/9 Figure 9. Leakage current versus junction temperature (typical values) Figure 7. Relative variation of thermal impedance, junction to ambient, versus pulse duration Figure 8. Thermal resistance junction to ambient versus copper surface under each lead Z th(j a) /Rth(j a) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 Single pulse tP(s) Recommended pad layout PCB FR4, copper thickness = 35 µm 0 10 20 30 40 50 60 70 80 90 100 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 SCU(cm²) PCB FR4, copper thickness = 35 µm R (°C/W) th(j-a) IR (nA) 1.E+00 1.E+01 1.E+02 1.E+03 25 50 75 100 125 150 V R=VRM Tj(°C) |
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