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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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WM8148 Arkusz danych(PDF) 2 Page - Wolfson Microelectronics plc |
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WM8148 Arkusz danych(HTML) 2 Page - Wolfson Microelectronics plc |
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2 / 43 page  WM8148 Production Data WOLFSON MICROELECTRONICS LTD PD Rev 4.0 April 1999 2 PIN CONFIGURATION ORDERING INFORMATION DEVICE TEMP. RANGE PACKAGE XWM8148CFT/V 0 to 70 oC 48-pin 1mm thick body TQFP 37 47 46 45 44 43 42 41 40 39 38 48 DVDD1 VSMP AGND5 MCLK DGND3 AVDD4 RLC DGND1 OP0 OP1 OP2 OP3 RINP AGND3 VRT VRX VRLC OVRD AGND1 AGND4 DGND4 AVDD3 AVDD2 VRB 25 31 30 29 28 27 26 36 35 34 33 32 1 9 8 7 6 5 4 3 2 12 11 10 24 23 16 17 18 19 20 21 22 13 14 15 PIN DESCRIPTION PIN NAME TYPE DESCRIPTION 1 DVDD1 Supply Digital supply (3.3V to 5V) for digital inputs and SDO. 2 RLC Digital input Selects whether reset level clamp is applied, active high. If RLC is required on every pixel then this pin can be tied high. 3 AVDD4 Supply Analogue supply (5V). 4 DGND3 Ground Digital ground (0V). 5 MCLK Digital input Master clock. This clock is applied at N times the input pixel rate (N = 12, 8, 6, or 4 dependent on input sampling mode). MCLK is divided internally by N to generate internal clocks and to provide the clock source for digital logic. 6 AGND5 Ground Analogue ground (0V). Video sample synchronisation pulse. This pin may be either an input (default) or output. 7 VSMP Digital IO Input: This signal is pulsed externally to synchronise the WM8148’s video input sample instant and the N-phase internal clock to CCD clocks and interface bus timing. Output: This signal is pulsed internally to flag the video input sample instant, to allow the CCD clocks and interface bus to be synchronised to the WM8148. 8 DGND1 Ground Digital ground (0V) for output drivers. 9 OP0 Digital output 10 OP1 Digital output 11 OP2 Digital output 12 OP3 Digital output 12-bit signal data output bus. Data is output MSB on OP[11] and LSB on pin OP[0]. See description of pins 14-21 for mode definitions. 13 DVDD2 Supply Digital supply (3.3V-5V) for Digital IO pins and OP0 to OP3 14 OP4 Digital IO 15 OP5 Digital IO 16 OP6 Digital IO 17 OP7 Digital IO 18 OP8 Digital IO 19 OP9 Digital IO 20 OP10 Digital IO 21 OP11 Digital IO 12-bit bi-directional data bus. On pins OP[4] to OP[11], signal data is output if OEB = 0 and register write data is input if OEB = 1. There are five main modes: • Hi-Z: when OEB = 1 • Output 12-bit: twelve bit signal data output from bus • Output 8-bit muxed: signal data output on OP[11:4] at 2 ∗ ADC conversion rate • Input 8-bit: register write data input on OP[11:4] • Output 8-bit: register readback data output on OP[11:4] |
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