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L99PD08 Arkusz danych(PDF) 10 Page - STMicroelectronics |
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L99PD08 Arkusz danych(HTML) 10 Page - STMicroelectronics |
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10 / 41 page ![]() Pin definitions and functions L99PD08 10/41 Doc ID 15872 Rev 3 2.7.1 5.0 volt operation The voltage regulator input is available at the terminal VDDIO, the output is available at VCORE3. In the 5V operation mode it is recommended to attach a decoupling capacitor on VCORE3 to stabilize the regulator. Due to the limited current capability of this regulator no external loads should be attached on VCORE3. 2.7.2 3.3 volt operation In applications with 3.3 V supply only, both, VDDIO and VCORE3 have to be attached (shorted) to the local supply. If the internal supply (VCORE3) is below the threshold of the internal power-and-reset circuit, the device is in standby mode. The device is in low power consumption and no SPI communications are possible. 2.8 GND (2 pins) These two pins are the GND voltage supply of the device and have to be connected externally. 2.9 Faultn This active low pin indicates any internal error reported by the device. This can be a High Side Driver failure or a communication error. In fault condition this open drain output is set to low, while during reset it is left open. This pin has to be connected to a pull up resistor. 2.10 SYNC The SYNC pin reflects the OUTx corresponding to the channel selected in the control register bits MUX_EN, MUX_A, B, C (Addr: hex00; Bit 7-4). If the multiplexer is disabled the SYNC pin is actively pulled low. Figure 3. Example for SYNC pin functionality OUT0 OUT1 SYNC Channel 0 selected Channel 1 selected |
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