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PBSS302ND Arkusz danych(PDF) 2 Page - NXP Semiconductors |
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PBSS302ND Arkusz danych(HTML) 2 Page - NXP Semiconductors |
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2 / 14 page ![]() PBSS302ND_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 18 February 2008 2 of 14 NXP Semiconductors PBSS302ND 40 V, 4 A NPN low VCEsat (BISS) transistor 2. Pinning information 3. Ordering information 4. Marking 5. Limiting values Table 2. Pinning Pin Description Simplified outline Symbol 1 collector 2 collector 3 base 4 emitter 5 collector 6 collector 13 2 4 5 6 sym014 1, 2, 5, 6 4 3 Table 3. Ordering information Type number Package Name Description Version PBSS302ND SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457 Table 4. Marking codes Type number Marking code PBSS302ND C7 Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - 60 V VCEO collector-emitter voltage open base - 40 V VEBO emitter-base voltage open collector - 5 V IC collector current [1] -4 A ICM peak collector current single pulse; tp ≤ 1ms -15 A IB base current - 0.8 A IBM peak base current single pulse; tp ≤ 1ms -2 A Ptot total power dissipation Tamb ≤ 25 °C [2] - 360 mW [3] - 600 mW [4] - 750 mW [1] - 1.1 W [2][5] - 2.5 W |
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