SDIP-38L datasheet(11/21 Pages) STMICROELECTRONICS

11 / 21 page

STGIPL14K60

Electrical characteristics

Doc ID 15589 Rev 3

11/21

ISDl

SD logic “0” input bias current

SD = 0 V

µA

Dead time

see

Figure 8

600

Table 10.

Logic inputs (continued)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

Table 11.

OPAMP characteristics (VCC = 15 V)

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

Vio

Input offset voltage

Vic = 0 V, Vo = 7.5 V

Iio

Input offset current

Vic = 0 V, Vo = 7.5 V

440

Iib

Input bias current (1)

100

200

Vicm

Input common mode voltage

range

VOL

Low level output voltage

RL = 10 kΩ to VCC

150

VOH

High level output voltage

RL = 10 kΩ to GND

14.7

Output short circuit current

Source,

Vid = +1; Vo = 0 V

Sink,

Vid = -1; Vo = VCC

Slew rate

Vi = 1

÷ 4 V; C

L = 100 pF;

unity gain

2.5

3.8

µs

GBWP

Gain bandwidth product

Vo = 7.5 V

MHz

Avd

Large signal voltage gain

RL = 2 kΩ

SVR

Supply voltage rejection ratio

vs. VCC

CMRR

Common mode rejection ratio

The direction of input current is out of the IC.

Table 12.

Sense comparator characteristics (VCC = 15 V)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

Iio

Input bias current

VCP+ = 1 V

µA

Vol

Open-drain low-level output

voltage

Iod = - 3 mA

0.5

td_comp

Comparator delay

SD/OD pulled to 5 V through

100 k

Ω resistor

130

Slew rate

CL = 180 pF; Rpu = 5 kΩ

V/µsec

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