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DOC200103 Arkusz danych(PDF) 5 Page - Vectron International, Inc |
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DOC200103 Arkusz danych(HTML) 5 Page - Vectron International, Inc |
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5 / 20 page ![]() SIZE CODE IDENT NO. UNSPECIFIED TOLERANCES DWG NO. REV. SHEET A 00136 N/A DOC200103 C 5 by design similarity. A copy of the parts list and materials can be provided for customer review upon request. 4.1.3.1 Class B Microcircuits. When specified, microcircuits assembled into Pedigree Codes B and C devices (¶ 5.2a) are procured from wafer lots that have passed MIL-PRF-55310 element evaluations for Class B devices. 4.1.4 Packages. Packages are procured that meet the construction, lead materials and finishes as specified in MIL-PRF-55310. Package lots are upscreened in accordance with the requirements of MIL-PRF-38534 as applicable. 4.1.5 Traceability. Class S active device lots are homogenous and traceable to the manufacturer’s individual wafer. Swept Quartz Crystals are traceable to the quartz bar and the processing details of the autoclave lot, as applicable. All other elements and materials are traceable to their incoming inspection lots. Manufacturing lot and date code information shall be recorded, by TCXO serial number, of every component and all materials used in the manufacture of that TCXO. All semiconductors used in the manufacture of a given production lot of TCXOs shall be from the same wafer and have the same manufacturing lot date code. A production lot, as defined by Vectron, is all oscillators that have been kitted and assembled as a single group. After the initial kitting and assembly, this production lot may be divided into multiple sublots to facilitate alignment and test capacity and may be sealed at multiple times within a 13 week window. 4.2 Mechanical. 4.2.1 Package Outline. Table 1 links each Hi-Rel Standard Model Number of this specification to a corresponding package style. Mechanical Outline information of each package style is found in the referenced Figure. 4.2.2 Thermal Characteristics. Because these TCXOs are multichip hybrid designs, the actual θjc to any one given semiconductor die will vary, but the combined average for all active devices results in a θjc of approximately 40°C/W. The typical die temperature rise at any one given semiconductor is 2°C to 4°C. With the oscillator operating at +125°C, the average junction temperature is approximately +129°C and under no circumstance will it ever exceed the maximum manufacturer’s rated junction temperature of +150°C. 4.3 Electrical. 4.3.1 Input Power. CMOS devices are designed for 3.3 or 5.0 volt dc operation, ±5%. Sinewave devices are designed for 5.0, 12.0 or 15.0 volt dc operation, ±5%. 4.3.2 Temperature Range. Operating range is IAW the chosen temperature stability code. 4.3.3 Frequency Tolerance. Temperature stability includes initial accuracy at +25°C (with EFC), load ±10% and supply ±5%. All devices include an EFC pin and the external frequency |
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