LIS302DL datasheet(17/42 Pages) STMICROELECTRONICS

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LIS302DL

Application hints

17/42

Application hints

Figure 5.

LIS302DL electrical connection

The device core is supplied through Vdd line while the I/O pads are supplied through

Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10 µF Al) should be

placed as near as possible to the pin 6 of the device (common design practice).

All the voltage and ground supplies must be present at the same time to have proper

behavior of the IC (refer to

Figure 5). It is possible to remove Vdd maintaining Vdd_IO

without blocking the communication busses, in this condition the measurement chain is

powered off.

The functionality of the device and the measured acceleration data is selectable and

accessible through the I2C/SPI interface.When using the I2C, CS must be tied high.

The functions, the threshold and the timing of the two interrupt pins (INT 1 and INT 2) can be

completely programmed by the user though the I2C/SPI interface.

4.1

Soldering information

The LGA package is compliant with the ECOPACK®, RoHS and “Green” standard. It is

qualified for soldering heat resistance according to JEDEC J-STD-020C.

Leave “Pin 1 Indicator” unconnected during soldering.

Land pattern and soldering recommendation are available at www.st.com/mems.

Top VIEW

10uF

Vdd

100nF

GND

Vdd_IO

Digital signal from/to signal controller.Signal’s levels are defined by proper selection of Vdd_IO

TOP VIEW

DIRECTIONS OF THE

DETECTABLE

ACCELERATIONS

LIS302DL Arkusz danych(PDF) 17 Page - STMicroelectronics