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SSM2518CBZ-R7 Arkusz danych(PDF) 38 Page - Analog Devices |
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SSM2518CBZ-R7 Arkusz danych(HTML) 38 Page - Analog Devices |
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38 / 48 page ![]() SSM2518 Data Sheet Rev. A | Page 38 of 48 Bits Bit Name Settings Description Reset Access 1000 193 ms 1001 384 ms 1010 768 ms 1011 1.536 sec 1100 3.072 sec 1101 6.144 sec 1110 12.288 sec 1111 24.576 sec DRC CONTROL 3 REGISTER Address: 0x0C, Reset: 0x57, Name: DRC_Control_3 Table 25. Bit Descriptions for DRC_Control_3 Bits Bit Name Settings Description Reset Access [7:4] DRC_LT DRC Limiter Threshold Setting. Relative to input. 0x5 RW 0000 0 dB 0001 −1 dB 0010 −2 dB 0011 −3 dB 0100 −4 dB 0101 −5 dB 0110 −6 dB 0111 −7 dB 1000 −8 dB 1001 −10 dB 1010 −12 dB 1011 −14 dB 1100 −16 dB 1101 −18 dB 1110 −20 dB 1111 −22 dB |
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