| Zakładka z wyszukiwarką danych komponentów |
|
MCP2021 Arkusz danych(PDF) 16 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
MCP2021 Arkusz danych(HTML) 16 Page - Microchip Technology |
|
16 / 52 page ![]() MCP2021/2/1P/2P DS22018F-page 16 © 2005-2012 Microchip Technology Inc. 1.6 Internal Voltage Regulator 1.6.1 5.0V REGULATOR The MCP2021 has a low-drop-out voltage, positive reg- ulator capable of supplying 5.00 VDC ±3% at up to 50 mA of load current over the entire operating temper- ature range of -40°C to +125°C. With a load current of 50 mA, the minimum input to output voltage differential required for the output to remain in regulation is typi- cally +0.5V (+1V maximum over the full operating tem- perature range). Quiescent current is less than 100 µA with a full 50 mA load current when the input to output voltage differential is greater than +3.00V. The regulator requires an external output bypass capacitor for stability. See Figure 2-3 for correct capacity and ESR for stable operation. Designed for automotive applications, the regulator will protect itself from double-battery jumps and up to +43V load dump transients. The voltage regulator has both short-circuit and thermal-shut-down protection built in. Regarding the correlation between VBB, VREG and IDD, please refer to Figure 1-10 throughFigure 1-12. When the input voltage (VBB) drops below the differential needed to provide stable regulation, the output VREG will track the input down to approximately 3.5V, at which point the regulator will turn off. This will allow microcontrollers with internal POR circuits to generate a clean arming of the POR trip point. The MCP2021 will then monitor VBB and turn on the regulator when VBB rises above 5.75, again. When the input voltage (VBB) drops below the differen- tial needed to provide stable regulation, the output VREG) will track the input down to approximately +4.25V. The regulator will turn off the output at this point. This will allow PIC® microcontrollers with internal POR circuits to generate a clean arming of the POR trip point. The regulator output will stay off until VBB is above +5.75 VDC. In the start phase, the device must detect at least 5.75V to initiate operation during power up. In the Power- Down mode, the VBB monitor will be turned off. The regulator has a thermal shutdown. If the thermal protection circuit detects an overtemperature condition, and the signals TXD and RXD are LOW, or TXD is HIGH, the regulator will shut down. The recovery from the thermal shutdown is equal to adequate cooling time. FIGURE 1-9: Voltage Regulator Block Diagram. Note: The regulator has an overload current limiting of approximately 100 mA. During a short circuit, the VREG is monitored. If VREG is lower than 3.5V, the VREG will turn off. After a recovery time of about three milliseconds, the VREG will be checked again. If there is no short circuit (VREG >3.5V), the VREG will be switched back on. Pass Element Sampling Network Buffer VREG VBB VSS Fast Transient Loop VREF |
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |