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STLC3055N Arkusz danych(PDF) 7 Page - STMicroelectronics |
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STLC3055N Arkusz danych(HTML) 7 Page - STMicroelectronics |
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7 / 34 page ![]() STLC3055N Pin description 7/34 17 RS Protection resistors image (the image resistor is connected from this node to ZAC). 18 ZB Balance network for 2 to 4 wire conversion (the balance impedance ZB is connected from this node to AGND. ZA impedance is connected from this node to ZAC1). 19 CAC AC feedback input, AC/DC split capacitor (CAC). 20 TX 4 wire output port (TX output). The signal is referred to AGND. If connected to single supply CODEC input it must be DC decoupled with proper capacitor. 21 VF Feedback input for DC/DC converter controller. 22 CLK Power switch controller clock (typ. 125 kHz). This pin can also be connected to CVCC or AGND. When the CLK pin is connected to CVCC an auto-oscillation is internally generated and it is used instead of the external clock. When the CLK pin is connected to AGND, the GATE output is disabled. 23 GATE Driver for external Power MOS transistor (P-channel). 24 RSENSE Voltage input for current sensing. RSENSE should be connected close to this pin and VPOS pin. The PCB layout should minimize the extra resistance introduced by the copper tracks. 25 VPOS Positive supply 26 CVCC Internal positive voltage supply filter. 27 AGND Analog ground, must be shorted with BGND. 28 RLIM Constant current feed programming pin (via RLIM). RLIM should be connected close to this pin and AGND pin to avoid noise injection. 29 IREF Internal bias current setting pin. RREF should be connected close to this pin and AGND pin to avoid noise injection. 30 RTH Off-hook threshold programming pin (via RTH). RTH should be connected close to this pin and AGND pin to avoid noise injection. 31 RD DC feedback and ring trip input. RD should be connected close to this pin and AGND pin to avoid noise injection. 32 ILTF Transversal line current image output. 33 CSVR Battery supply filter capacitor. 34 BGND Battery ground, must be shorted with AGND. 35 VBAT Regulated battery voltage self generated by the device via DC/DC converter. Must be shorted to VBAT1. 37 RING 2 wire port; RING wire (Ib is the current sunk into this pin). 41 TIP 2 wire port; TIP wire (Ia is the current sourced from this pin). 43 CREV Reverse polarity transition time control. One proper capacitor connected between this pin and AGND is setting the reverse polarity transition time. This is the same transition time used to shape the "trapezoidal ringing" during ringing injection. 44 VBAT1 Frame connection. Must be shorted to VBAT. Table 2. Pin description (continued) N° Pin Function |
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