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AD5544ARS Arkusz danych(PDF) 12 Page - Analog Devices |
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AD5544ARS Arkusz danych(HTML) 12 Page - Analog Devices |
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12 / 16 page ![]() REV. 0 AD5544/AD5554 –12– CLOCK FREQUENCY – Hz 100 1k 10k 100k 1M 100 VDD = 5V 10% TA = 25 C 90 80 70 60 50 40 30 20 TPC 17. AD5544/AD5554 Power Supply Rejection vs. Frequency TEMPERATURE – C 55 –50 VDD = 5V VREF = 10V LOGIC = VDD 54 53 52 51 50 49 48 47 46 –25 0 25 50 75 100 125 150 TPC 18. AD5544/AD5554 Power Supply Current vs. Temperature LOGIC INPUT VOLTAGE – Volts 600 0 VDD = 5V VREF = 10V TA = 25 C 500 400 300 200 100 0 12345 TPC 19. AD5544/AD5554 Power Supply Current vs. Logic Input Voltage CIRCUIT OPERATION The AD5544 and AD5554 contain four, 16-bit and 14-bit, current-output, digital-to-analog converters respectively. Each DAC has its own independent multiplying reference input. Both AD5544/AD5554 use 3-wire SPI compatible serial data inter- face, with a configurable asynchronous RS pin for half-scale (MSB = 1) or zero-scale (MSB = 0) preset. In addition, an LDAC strobe enables four channel simultaneous updates for hardware synchronized output voltage changes. D/A Converter Section Each part contains four current-steering R-2R ladder DACs. Figure 4 shows a typical equivalent DAC. Each DAC contains a matching feedback resistor for use with an external I-to-V converter amplifier. The RFBX pin is connected to the output of the external amplifier. The IOUTX terminal is connected to the inverting input of the external amplifier. The AGNDX pin should be Kelvin-connected to the load point in the circuit requiring the full 16-bit accuracy. These DACs are designed to operate with both negative or positive reference voltages. The VDD power pin is only used by the logic to drive the DAC switches ON and OFF. Note that a matching switch is used in series with the internal 5 k Ω feedback resistor. If users are attempting to mea- sure the value of RFB, power must be applied to VDD in order to achieve continuity. An additional VSS bias pin is used to guard the substrate during high temperature applications to minimize zero-scale leakage currents that double every 10 °C. The DAC output voltage is determined by VREF and the digital data (D) as: VV OUT REF =− × D 65536 (For AD5544) (Equation 1) VV OUT REF =− × D 16384 (For AD5554) (Equation 2) Note that the output polarity is opposite to the VREF polarity for dc reference voltages. |
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