Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

SSM2005 Arkusz danych(PDF) 8 Page - Analog Devices

Numer części SSM2005
Szczegółowy opis  Decoder 5.1-Channel Soundfield Generator
PDF  15 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

SSM2005 Arkusz danych(HTML) 8 Page - Analog Devices

Back Button SSM2005 Datasheet HTML 4Page - Analog Devices SSM2005 Datasheet HTML 5Page - Analog Devices SSM2005 Datasheet HTML 6Page - Analog Devices SSM2005 Datasheet HTML 7Page - Analog Devices SSM2005 Datasheet HTML 8Page - Analog Devices SSM2005 Datasheet HTML 9Page - Analog Devices SSM2005 Datasheet HTML 10Page - Analog Devices SSM2005 Datasheet HTML 11Page - Analog Devices SSM2005 Datasheet HTML 12Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 15 page
background image
SSM2005
–8–
REV. 0
Power-Up
The SSM2005 will be in an undefined mode on power-up. Reset
should be applied to the SSM2005, or the mode control logic
should be loaded to put the device into a definite mode state.
Serial Data Control Inputs
The SSM2005 provides a simple 3- or 4-wire serial interface to
control the mode settings for the device. Data is input on the
DATA IN pin, while CLOCK IN is the serial clock. Data can be
shifted into the SSM2005 at clock rates up to 1 MHz.
STEREO
INPUTS
PRECISION
SUM AND
DIFFERENCE
AMPLIFIERS
AMPLIFIERS
CIRCLE
SURROUND
OUTPUTS
L
R
L+R = CENTER
L–R = SURROUND
LEFT
RESET
CLOCK
SELECT
LOAD
SERIAL BUS
+V
GND
VACOM
INPUT POWER
NOISE
GENERATOR
L
R
C
LS
RS
RIGHT
CENTER
SURROUND
HIGH BAND
SURROUND
LOW BAND
CROSSOVER
NETWORK
7X
STEERING CONTROL GENERATOR
MODE CONTROL LOGIC
DATA
AUTO BALANCE
AND MUTE
TO SUBWOOFER
FILTER
CENTER CHANNEL
CANCEL
CHANNEL
STEERING
VCAs
OUTPUT
AMPLIFIERS
Figure 6. Block Diagram
The shift register clock at CLOCK IN is enabled when the
WRITE input is low. The WRITE pin can therefore be used as a
chip select input. However, the shift register contents are not
transferred into the register banks until the rising edge of
LOAD.
For a traditional 3-wire serial interface,
WRITE and LOAD
should be tied together. Figure 7 shows the timing diagram and
minimum timing requirements for the digital interface.
To enable a data transfer, the
WRITE and LOAD inputs are
driven low. The 8-bit serial data, formatted MSB first, should
be fed to DATA IN and clocked into the shift register on the
rising edge of CLOCK IN. The new mode setting will then
activate on the rising edge of
WRITE and LOAD.
Table II. Modes List
Modes
Effect
Video
Center Channel Cancellation Active
Music
Center Cancel Cancellation Off; Center Reduced by –4 dB.
5-2-5
5-Channel Circle Surround Enabled
4-2-4
4-Channel Matrix Enabled
Center On
Center Channel Output On
Phantom Center
Center Channel Output Off; Divided and Added to LF and RF
Sound Spread On
Hard Panned Input Steered to Front and Rear Side
Sound Spread Off
Hard Panned Input Steered to Front Side Only
Autobalance On
Balances L and R to
±1 dB
Autobalance Off
Autobalance Disabled
Noise Off
Noise Generator Disabled
Noise On
Noise Generator On; Inputs Muted



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15


Arkusz danych Pobierz

Go To PDF Page


Link URL



Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Link do karty katalogowej    |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com