ADT7420UCPZ-R2 datasheet(7/24 Pages) AD

7 / 24 page

Data Sheet

ADT7420

Rev. 0 | Page 7 of 24

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

17 EP

VDD

GND

INT

SCL

SDA

TOP VIEW

(Not to Scale)

NOTES

1. NC = NO CONNECT. THE NC PIN IS NOT

BONDED TO THE DIE INTERNALLY.

2. TO ENSURE CORRECT OPERATION, THE

EXPOSED PAD SHOULD EITHER BE LEFT

FLOATING OR CONNECTED TO GROUND.

ADT7420

Figure 3. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

SCL

I2C Serial Clock Input. The serial clock is used to clock in and clock out data to and from any register of the ADT7420.

Open-drain configuration. A pull-up resistor is required, typically 10 kΩ.

SDA

I2C Serial Data Input/Output. Serial data to and from the part is provided on this pin. Open-drain configuration. A

pull-up resistor is required, typically 10 kΩ.

I2C Serial Bus Address Selection Pin. Logic input. Connect to GND or VDD to set an I2C address.

No Connect. The NC pin is not bonded to the die internally.

INT

Overtemperature and Undertemperature Indicator. Logic output. Power-up default setting is as an active low

comparator interrupt. Open-drain configuration. A pull-up resistor is required, typically 10 kΩ.

Critical Overtemperature Indicator. Logic output. Power-up default polarity is active low. Open-drain configuration.

A pull-up resistor is required, typically 10 kΩ.

GND

Analog and Digital Ground.

VDD

Positive Supply Voltage (2.7 V to 5.5 V). The supply should be decoupled with a 0.1 μF ceramic capacitor to ground.

No Connect. The NC pin is not bonded to the die internally.

Exposed Pad. To ensure correct operation, the exposed pad should either be left floating or connected to ground.

ADT7420UCPZ-R2 Arkusz danych(PDF) 7 Page - Analog Devices

ADT7420UCPZ-R2 Arkusz danych(HTML) 7 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Arkusz danych Pobierz

Link URL