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STM32F050C4 Arkusz danych(PDF) 72 Page - STMicroelectronics |
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STM32F050C4 Arkusz danych(HTML) 72 Page - STMicroelectronics |
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72 / 97 page ![]() Electrical characteristics STM32F050xx 72/97 Doc ID 023683 Rev 1 6.3.15 12-bit ADC characteristics Unless otherwise specified, the parameters given in Table 49 are preliminary values derived from tests performed under ambient temperature, fPCLK2 frequency and VDDA supply voltage conditions summarized in Table 15: General operating conditions. Note: It is recommended to perform a calibration after each power-up. Table 49. ADC characteristics Symbol Parameter Conditions Min Typ Max Unit VDDA Analog supply voltage for ADC ON 2.4 - 3.6 V fADC ADC clock frequency 0.6 - 14 MHz fS (1) Sampling rate 0.05 - 1 MHz fTRIG (1) External trigger frequency fADC = 14 MHz - - 823 kHz -- 17 1/fADC VAIN Conversion voltage range 0 - VDDA V RAIN (1) External input impedance See Equation 1 and Table 50 for details -- 50 k Ω RADC (1) Sampling switch resistance - - 1 k Ω CADC (1) Internal sample and hold capacitor -- 8 pF tCAL (1) Calibration time fADC = 14 MHz 5.9 µs 83 1/fADC tlatr (1) Trigger conversion latency fADC = fPCLK/2 = 14 MHz 0.196 µs fADC = fPCLK/2 5.5 1/fPCLK fADC = fPCLK/4 = 12 MHz 0.219 µs fADC = fPCLK/4 10.5 1/fPCLK fADC = fHSI14 = 14 MHz 0.188 - 0.259 µs JitterADC ADC jitter on trigger conversion fADC = fHSI14 -1 - 1/fHSI14 tS (1) Sampling time fADC = 14 MHz 0.107 - 17.1 µs 1.5 - 239.5 1/fADC tSTAB (1) Power-up time 0 0 1 µs tCONV (1) Total conversion time (including sampling time) fADC = 14 MHz 1 18 µs 14 to 252 (tS for sampling +12.5 for successive approximation) 1/fADC 1. Guaranteed by design, not tested in production. |
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