 |
Zakładka z wyszukiwarką danych komponentów |
|
|
Zakładka z wyszukiwarką danych komponentów |
|
AD1981BBSTZ Arkusz danych(PDF) 12 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD1981BBSTZ Arkusz danych(HTML) 12 Page - Analog Devices |
|
|
12 / 32 page  AD1981B Rev. C | Page 12 of 32 INDEXED CONTROL REGISTERS Table 8. Reg Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default 0x00 Reset X SE4 SE3 SE2 SE1 SE0 ID9 ID8 ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0 0x0090 0x02 Master Volume MM X X LMV4 LMV3 LMV2 LMV1 LMV0 RM1 X X RMV4 RMV3 RMV2 RMV1 RMV0 0x8000 0x04 Headphone Volume HPM X X LHV4 LHV3 LHV2 LHV1 LHV0 RM1 X X RHV4 RHV3 RHV2 RHV1 RHV0 0x8000 0x06 Mono Volume MVM X X X X X X X X X X MV4 MV3 MV2 MV1 MV0 0x8000 0x0C Phone Volume PHM X X X X X X X X X X PHV4 PHV3 PHV2 PHV1 PHV0 0x8008 0x0E MIC Volume MCM X X X X X X X X M20 X MCV4 MCV3 MCV2 MCV1 MCV0 0x8008 0x10 Line-In Volume LVM X X LLV4 LLV3 LLV2 LLV1 LLV0 RM1 X X RLV4 RLV3 RLV2 RLV1 RLV0 0x8808 0x12 CD Volume CVM X X LCV4 LCV3 LCV2 LCV1 LCV0 RM1 X X RCV4 RCV3 RCV2 RCV1 RCV0 0x8808 0x16 AUX Volume AM X X LAV4 LAV3 LAV2 LAV1 LAV0 RM1 X X RAV4 RAV3 RAV2 RAV1 RAV0 0x8808 0x18 PCM-Out Volume OM X X LOV4 LOV3 LOV2 LOV1 LOV0 RM1 X X ROV4 ROV3 ROV2 ROV1 ROV0 0x8808 0x1A Record Select X X X X X LS2 LS1 LS0 X X X X X RS2 RS1 RS0 0x0000 0x1C Record Gain IM X X X LIM3 LIM2 LIM1 LIM0 RM1 X X X RIM3 RIM2 RIM1 RIM0 0x8000 0x20 General- Purpose X X X X X X MIX MS LPBK X X X X X X X 0x0000 0x26 Power-Down Ctrl/Stat EAPD PR6 PR5 PR4 PR3 PR2 PR1 PR0 X X X X REF ANL DAC ADC 0x000X 0x28 Ext’d Audio ID IDC1 IDC0 X X REVC1 REVC0 AMAP X X X DSA1 DSA0 X SPDIF X VRAS 0xX605 0x2A Ext’d Audio Stat/Ctrl VFORCE X X X X SPCV X X X X SPSA1 SPSA0 X SPDIF X VRA 0x0000 0x2C PCM Front DAC Rate SRF15 SRF14 SRF13 SRF12 SRF11 SRF10 SRF9 SRF8 SRF7 SRF6 SRF5 SRF4 SRF3 SRF2 SRF1 SRF0 0xBB80 0x32 PCM L/R ADC Rate SRA15 SRA14 SRA13 SRA12 SRA11 SRA10 SRA9 SRA8 SRA7 SRA6 SRA5 SRA4 SRA3 SRA2 SRA1 SRA0 0xBB80 0x3A SPDIF Control V X SPSR1 SPSR0 L CC6 CC5 CC4 CC3 CC2 CC1 CC0 PRE COPY /AUD PRO 0x2000 0x60 EQ Ctrl EQM MAD LBEN X X X X X X SYM CHS BCA5 BCA4 BCA3 BCA2 BCA1 BCA0 0x8080 0x62 EQ Data CFD15 CFD14 CFD13 CFD12 CFD11 CFD10 CFD9 CFD8 CFD7 CFD6 CFD5 CFD4 CFD3 CFD2 CFD1 CFD0 0x0000 0x64 Mixer ADC, Volume MXM X X X LMG3 LMG2 LMG1 LMG0 RM1 X X X RMG3 RMG2 RMG1 RMG0 0x8000 0x72 Jack Sense X X X JS MT2 JS MT1 JS MT0 JS1 EQB JS0 EQB JS1 TMR JS0 TMR JS1 MD JS0 MD JS1 ST JS0 ST JS1 INT JS0 INT 0x0000 0x74 Serial Config SLOT 16 REGM 2 REGM 1 REGM 0 X X X CHEN X X X INTS X SPAL SPDZ SPLNK 0x7001 0x76 Misc Control Bit DACZ X MSPLT LODIS DAM X FMXE X MAD PD 2CMIC X MAD ST VREFH VREFD MBG1 MBG0 0x0000 0x7C Vendor ID1 F7 F6 F5 F4 F3 F2 F1 F0 S7 S6 S5 S4 S3 S2 S1 S0 0x4144 0x7E Vendor ID2 T7 T6 T5 T4 T3 T2 T1 T0 REV7 REV6 REV5 REV4 REV3 REV2 REV1 REV0 0x5374 All registers not shown. Bits containing an X are assumed to be reserved. Odd register addresses are aliased to the next lower even address. Reserved registers should not be written. Zeros should be written to reserved bits. 1 For AC ‘97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 0x76. The MSPLT bit enables separate mute bits for the left and right channels. If MSPLT is not set, the RM bit has no effect. |
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Polish ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
