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PIC16F684 Arkusz danych(PDF) 39 Page - Microchip Technology |
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PIC16F684 Arkusz danych(HTML) 39 Page - Microchip Technology |
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39 / 192 page ![]() © 2007 Microchip Technology Inc. DS41202F-page 37 PIC16F684 4.2.5.4 RA3/MCLR/VPP Figure 4-4 shows the diagram for this pin. The RA3 pin is configurable to function as one of the following: • a general purpose input • as Master Clear Reset with weak pull-up FIGURE 4-4: BLOCK DIAGRAM OF RA3 4.2.5.5 RA4/AN3/T1G/OSC2/CLKOUT Figure 4-5 shows the diagram for this pin. The RA4 pin is configurable to function as one of the following: • a general purpose I/O • an analog input for the ADC • a Timer1 gate (count enable) • a crystal/resonator connection • a clock output FIGURE 4-5: BLOCK DIAGRAM OF RA4 VSS D Q CK Q D EN Q Data Bus RD PORTA RD PORTA WR IOCA RD IOCA Reset MCLRE RD TRISA VSS D EN Q MCLRE VDD Weak MCLRE Interrupt-on- Change Q3 Input Pin VDD VSS D Q CK Q D Q CK Q D Q CK Q D Q CK Q VDD D EN Q D EN Q Weak Analog Input Mode Data Bus WR WPUA RD WPUA RD PORTA WR PORTA WR TRISA RD TRISA WR IOCA RD IOCA FOSC/4 To A/D Converter Oscillator Circuit OSC1 CLKOUT 0 1 CLKOUT Enable Enable Analog(3) Input Mode RAPU RD PORTA To T1G INTOSC/ RC/EC(2) CLK(1) Modes CLKOUT Enable Note 1: CLK modes are XT, HS, LP, LPTMR1 and CLKOUT Enable. 2: With CLKOUT option. 3: Analog Input mode comes from ANSEL. Interrupt-on- Change Q3 I/O Pin |
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