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L4979D Arkusz danych(PDF) 10 Page - STMicroelectronics |
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L4979D Arkusz danych(HTML) 10 Page - STMicroelectronics |
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10 / 22 page ![]() Application information L4979D, L4979MD 10/22 Doc ID 10262 Rev 9 3 Application information 3.1 Voltage regulator The voltage regulator uses a p-channel MOS transistor as a regulating element. With this structure a low dropout voltage at current up to 150 mA is achieved. The output voltage is regulated up to transient input supply voltage of 40 V. No functional interruption due to over- voltage pulses is generated. The high precision of the output voltage is obtained with a pre- trimmed reference voltage. A short circuit protection to GND is provided. Figure 3. Behavior of output current versus regulated voltage Vo 3.2 Reset The reset circuit monitors the output voltage Vo. If the output voltage drops below Vo_th then Res becomes low with a delay time trr. Real trr value changes as a non-linear function of delta (Vo-th - Vo). The reset low signal is guaranteed for an output voltage Vo greater than 1V. When the output voltage becomes higher than Vo_th then Res goes high with a delay trd. This delay is obtained by 512 periods of an oscillator (see fig. 5). The oscillator period is given by: and reset pulse delay trd is given by: T OSC V rhth V rlth – C tr I cr ------------------------------------------------------ V rhth V rlth – C tr I dr ------------------------------------------------------ + = t rd 512 T OSC = |
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