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AX2000 Arkusz danych(PDF) 88 Page - Microsemi Corporation

Numer części AX2000
Szczegółowy opis  Axcelerator Family FPGAs
PDF  262 Pages
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Producent  MICROSEMI [Microsemi Corporation]
Strona internetowa  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

AX2000 Arkusz danych(HTML) 88 Page - Microsemi Corporation

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Detailed Specifications
2- 74
R e v i sio n 1 8
Implementation Example:
Figure 2-47 shows a complex clock distribution example. The reference clock (RefCLK) of PLLE is being
sourced from non-clock signal pins (INBUF to PLLINT). The CLK1 output of PLLE is being fed to the
RefCLK input of PLLF. The CLK2 output of PLLE is driving logic (via PLLOUT). In turn, this logic is driving
the global resource CLKE. PLLF is driving both CLKF and CLKG global resources.
Figure 2-47 • Complex Clock Distribution Example
CLK1
CLK2
FB
RefCLK
PLLF
CLK1
CLK2
FB
RefCLK
PLLE
PLLINT
INBUF
Non-Clock
Pins
P
N
PLLRCLK
PLLOUT
PLLRCLK
PLLRCLK
CLKE
Logic
CLKF
CLKG
CLKINT



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