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PIC16F882-I Arkusz danych(PDF) 41 Page - Microchip Technology

Numer części PIC16F882-I
Szczegółowy opis  28/40/44-Pin, Enhanced Flash-Based 8-Bit CMOS Microcontrollers
PDF  328 Pages
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Producent  MICROCHIP [Microchip Technology]
Strona internetowa  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F882-I Arkusz danych(HTML) 41 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
DS41291F-page 39
PIC16F882/883/884/886/887
3.0
I/O PORTS
There are as many as thirty-five general purpose I/O
pins available. Depending on which peripherals are
enabled, some or all of the pins may not be available as
general purpose I/O. In general, when a peripheral is
enabled, the associated pin may not be used as a
general purpose I/O pin.
3.1
PORTA and the TRISA Registers
PORTA is a 8-bit wide, bidirectional port. The
corresponding
data
direction
register
is
TRISA
(Register 3-2). Setting a TRISA bit (= 1) will make the
corresponding PORTA pin an input (i.e., disable the
output driver). Clearing a TRISA bit (= 0) will make the
corresponding PORTA pin an output (i.e., enables
output driver and puts the contents of the output latch
on the selected pin). Example 3-1 shows how to
initialize PORTA.
Reading the PORTA register (Register 3-1) reads the
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then
written to the PORT data latch.
The TRISA register (Register 3-2) controls the PORTA
pin output drivers, even when they are being used as
analog inputs. The user should ensure the bits in the
TRISA register are maintained set when using them as
analog inputs. I/O pins configured as analog input always
read ‘0’.
EXAMPLE 3-1:
INITIALIZING PORTA
Note:
The ANSEL register must be initialized to
configure an analog channel as a digital
input. Pins configured as analog inputs will
read ‘0’.
BANKSEL PORTA
;
CLRF
PORTA
;Init PORTA
BANKSEL ANSEL
;
CLRF
ANSEL
;digital I/O
BANKSEL TRISA
;
MOVLW
0Ch
;Set RA<3:2> as inputs
MOVWF
TRISA
;and set RA<5:4,1:0>
;as outputs
REGISTER 3-1:
PORTA: PORTA REGISTER
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
RA7
RA6
RA5
RA4
RA3
RA2
RA1
RA0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
RA<7:0>: PORTA I/O Pin bit
1
= Port pin is > VIH
0
= Port pin is < VIL
REGISTER 3-2:
TRISA: PORTA TRI-STATE REGISTER
R/W-1(1)
R/W-1(1)
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
TRISA7
TRISA6
TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
TRISA<7:0>: PORTA Tri-State Control bit
1
= PORTA pin configured as an input (tri-stated)
0
= PORTA pin configured as an output
Note
1:
TRISA<7:6> always reads ‘1’ in XT, HS and LP Oscillator modes.



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