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AS1312 Arkusz danych(PDF) 14 Page - ams AG |
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AS1312 Arkusz danych(HTML) 14 Page - ams AG |
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14 / 20 page ![]() www.ams.com/DC-DC_Step-Up Revision 1.12 14 - 20 AS1312 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 9.5 Layout Considerations Relatively high peak currents of 400mA (typ) circulate during normal operation of the AS1312. Long printed circuit tracks can generate additional ripple and noise that mask correct operation and prove difficult to “de-bug” during production testing. Referring to Figure 1, the input loop formed by C1, VIN and GND pins should be minimized. Similarly, the output loop formed by C2, VOUT and GND should also be minimized. Ideally both loops should connect to GND in a “star” fashion. Finally, it is important to return CREF to the GND pin directly. |
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