AS3665 datasheet(56/78 Pages) AMSCO

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AS3665

Datasheet, Confidential - Prog ramming S equen ce r C o mmands

possible (see Trigger pin TRIG on page 39):

With the MUX set start address and MUX set end address commands the memory area for the multiplexer between

the sequencers and the output PWM generators are initialized. (see MUX tables - assignments of sequencers to chan-

nels on page 49):

Table 80. Trigger Command

Trigger Command

Name

Bits

Bitname

Parameter Description

Trigger

Compiler syntax: TRG, wait trigger channels, send trigger channels;

D15:D13

111b

Wait for trigger from...

D12

Ext Trig

no trigger

wait for external trigger from pin TRIG

1. Set trig_input_on (see page 39)=1 to enable the input.

D11:D10

XXb

CH3

no trigger

wait for trigger from sequencer 3

CH2

no trigger

wait for trigger from sequencer 2

CH1

no trigger

wait for trigger from sequencer 1

Send trigger to...

Ext Trig

no trigger

send trigger to pin TRIG

D5:D4

XXb

CH3

no trigger

send trigger to sequencer 3

CH2

no trigger

send trigger to sequencer 2

CH1

no trigger

send trigger to sequencer 1

Table 81. MUX set start address Command

MUX set start address Command

Name

Bits

Bitname

Parameter Description

MUX set start

address

Compiler syntax: MSS, RAM address;

D15:D7

10011100

D6:D0

RAM address 0-127

Sets the multiplexer start address to ‘RAM address’. After the

next command is executed the multiplexer for this sequencer is

initialized by the content of this ‘RAM address’.

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