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Revision 2.4

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AS5030

Datasheet - Detailed Descri p ti on

7.4 Serial 2-Wire Connection (R/W Mode)

By connecting the configuration input C2 to VDD, the AS5030 is configured to 2-wire data transmission mode.

Only Clock (CLK) and Data (DIO) signals are required. A Chip Select (CS) signal is automatically generated by the DX output, when a time-out

of CLK occurs (typ. 20µs).

Note:

Read-only mode is also possible in this configuration.

Figure 8. SSI R/W Mode 2-wire Data Transmission

Figure 9. Timing Diagram in 2-wire SSI Mode

100n

CS

CLK

DI O

+5 V

VDD

VSS

VSS

C2

VDD

VDD

13

11

10

12

15

C1

VSS

3

14

I/O

Output

DX

9

AS5030

Micro

Controller

CMD4

CLK

CS

DIO read

t0

t6

command phase

data phase

DIO write

t1

12

3

4

5

6

7

22

DX

8

wait cycle

(> 500 ns)

CMD2

CMD3

CMD1

CMD0

D15

D14

D0

t5