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AS5030

Datasheet - Application In formatio n

8.7.2 Power Cycling Mode

The power cycling method shown in Figure 26 cycles the AS5030 by switching it on and off, using an external PNP transistor high side switch.

This mode provides the least power consumption of all three modes; when the sampling interval is more than 400ms, as the current consumption

in off-mode is zero.

It also has the longest start-up time of all modes, as the chip must always perform a “cold start“ from zero, which takes about 1.9 ms.

The optional filter R1/C1 may again be added to reduce peak currents in the 5V power supply line.

Figure 26. Application Example III: Ultra-low Power Encoder

Figure 26 shows an overview of the average supply currents in the three reduced power modes, depending on the sampling interval. The graphs

shows that the Low Power Mode is the best option for sampling intervals <4ms, while the Ultra-low Power Mode is the best option for sampling

intervals between 4~400ms. At sampling intervals > 400ms, the power cycling mode is the best method to minimize the average current

consumption. The curves are based on the figures given in Low Power Mode and Ultra-low Power Mode on page 31.

Figure 27. Average Current Consumption of Reduced Power Modes

Micro

Controller

+5V

VDD

VSS

VSS

VDD

10k

on/off

C1

>1µF

R1

ton

toff

AS5030

100n

CS

CLK

DIO

VSS

VDD

S

N

C1 C2

0

A S 50 30 a v era g e c u rrent co ns u m p tio n

0,0

0,5

1,0

1,5

2,0

2,5

3,0

3,5

4,0

4,5

5,0

1

1 0

100

10 0 0

s am p lin g in terv al [m s]

Lo w Po we r Mo de

Po we r C yclin g Mo d e

Ultra L o w P owe r M o d e