SERIES 2 FLASH MEMORY CARDS

290434 – 19

Bus

Command

x8 Mode

x16 Mode

Operation

Write

Erase

Data e 20H

Data e 2020H

Setup

Address e Block

Address e Block Pair

Within Card to be

Within Card to be

Erased

Erased

Write

Erase

Data e D0H

Data e D0D0H

Address e Block

Address e Block

Within Card to be

Pair Within Card to

Erased

be Erased

Read

Defaults to

Status Register

Status Register

Device Sta- Data Toggle OE

Data Toggle OE

or

to

Read Mode

update Status

to update Status

Register

Register

Standby

Check SR Bit 7

Check SR Bits 7 and 15

1 e Ready

1 e Ready

0 e Busy

0 e Busy

FULL STATUS CHECK PROCEDURE

290434 – 20

Bus

Command

x8 Mode

x16 Mode

Operation

Standby

Check SR Bit 3

Check SR Bits

3 and 11

Low

Detected Low

Standby

Check SR Bits 4 and 5 Check SR Bits 4 5

Both 1 e Command

12 13

Sequence Error

All 1 e Command

Sequence Error

Standby

Check SR Bit 5

Check SR Bits

1 e Block Erase

5 and 13

Error

Both 1 e Block

Erase Failure

Figure 14 Device-Level Automated Erase Algorithm

NOTES

1 Repeat for subsequent data writes

2 In addition the card’s READY-BUSY STATUS REGISTER or the RDYBSY

pin may be used

3 Full device-level status check can be done after each block erase or after a sequence of block erases

4 Write FFH (or FFFFH) after the last block erase operation to reset the device(s) to Ready Array Mode

before further attempts are allowed by the Write State Machine

6 If a block erase operation fails during a multiple block erase sequence SR Bit 4 (Write Status) will not be cleared until the

Command User Interface receives the Clear Status Register command

21