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ADMCF341 Arkusz danych(PDF) 29 Page - Analog Devices

Numer części ADMCF341
Szczegółowy opis  28-Lead Flash and ROM Memory, Mixed-Signal DSPs with Enhanced Analog Front End
PDF  36 Pages
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Strona internetowa  http://www.analog.com
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ADMCF341 Arkusz danych(HTML) 29 Page - Analog Devices

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REV. A
ADMC(F)341
–29–
0
0
0
0
0
0
0
0
0
0
LOW SIDE GATE CHOPPING
0 = DISABLE
1 = ENABLE
HIGH SIDE GATE CHOPPING
DM (0x200B)
GDCLK
GATE DRIVE CHOPPING FREQUENCY
PWMGATE (R/W)
PWMPD (R/W)
DM (0x200A)
PWMPD
PWMCHA (R/W)
PWM CHANNEL A
DUTY CYCLE
DM (0x200C)
PWMCHB (R/W)
PWM CHANNEL B
DUTY CYCLE
DM (0x200D)
PWMCHC (R/W)
DM (0x200E)
PWM CHANNEL C
DUTY CYCLE
TMIN =
PWMPD
fCLKOUT
fCHOP =
4
(GDCLK + 1)
fCLKOUT
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
00
0
Figure 24. Configuration of Additional PWM Registers
Default bit values are shown; if no value is shown, the bit field is undefined at reset.
Reserved bits are shown on a gray field—these bits should always be written as shown.



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