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AN2260 Arkusz danych(PDF) 4 Page - STMicroelectronics

Numer części AN2260
Szczegółowy opis  STR73x SystemMemory Boot Mode
PDF  10 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN2260 Arkusz danych(HTML) 4 Page - STMicroelectronics

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1 General description
AN2260
4/10
Note:
The serial link receive interface pin (UART0_RX) must be held HIGH during the
SystemMemory code initialization phase.
1.3
Loading code in SystemMemory boot mode
As previously described, the STR73x enters SystemMemory boot mode by controlling the state
of the M1 pin during the Reset Sequence.
Following the serial link initialization sequence (see the following chapters) the SystemMemory
code enters a loop to receive a specified number of bytes, and store them sequentially to RAM
starting at address 0xA0000000. The receive byte count depends on the serial interface and is
currently defined as 128 bytes for UART.
When the proper number of bytes is received, the STR73x then jumps to address 0xA0000000
and begins to execute the downloaded code.
Generally, this small piece of code (called loader or monitor) will contain another receive loop
which may then continue to load code and data at a user specified location. The pre-initialized
serial link may be used accomplish this without modifications.
The second level of downloaded code may contain the final user application. It may also
contain another, more sophisticated, loader routine which adds a transmission protocol to
enhance data integrity. The secondary loader may even change to a different download
method, baud rate, system operating frequency, etc.
1.4
Exiting SystemMemory boot mode
SystemMemory boot mode must be terminated in order to execute a program in a normal
USER mode. The STR73x may exit this mode by applying a hardware Reset on the RSTIN pin.
At the time of the reset, the mode pins (M0 & M1) must be set at the proper levels to enter the
desired user mode. Following the reset, the STR73x CPU will begin executing code from
location 0x00000000 of the embedded Flash.
Table 2.
Mode Pin vs Memory Mapping
M1
M0
Boot Mode
Memory Mapping
Note
0
0
User Boot mode 1 FLASH sector B0F0 mapped at 0h
All FLASH sectors accessible
except SystemMemory sector
0
1
User Boot mode 2 FLASH sector B0F0 mapped at 0h
FLASH B0F1 sector and
SystemMemory sector not
accessible
1
0
SystemMemory
SystemMemory mapped at 0h
-
11
Reserved
-
-



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