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PM0214 Arkusz danych(PDF) 19 Page - STMicroelectronics |
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PM0214 Arkusz danych(HTML) 19 Page - STMicroelectronics |
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19 / 245 page ![]() DocID022708 Rev 4 19/245 PM0214 The Cortex-M4 processor 244 These registers are mutually exclusive bitfields in the 32-bit PSR. The bit assignments are as shown in Figure 3 and Figure 4. Figure 3. APSR, IPSR and EPSR bit assignments Figure 4. PSR bit assignments Access these registers individually or as a combination of any two or all three registers, using the register name as an argument to the MSR or MRS instructions. For example: • Read all of the registers using PSR with the MRS instruction • Write to the APSR N, Z, C, V, and Q bits using APSR_nzcvq with the MSR instruction. The PSR combinations and attributes are: See the instruction descriptions MRS on page 173 and MSR on page 174 for more information about how to access the program status registers. Table 4. PSR register combinations Register Type Combination PSR read-write(1), (2) 1. The processor ignores writes to the IPSR bits. 2. Reads of the EPSR bits return zero, and the processor ignores writes to the these bits APSR, EPSR, and IPSR IEPSR read-only EPSR and IPSR IAPSR read-write(1) APSR and IPSR EAPSR read-write(2) APSR and EPSR |
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