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PM0214 Arkusz danych(PDF) 194 Page - STMicroelectronics |
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PM0214 Arkusz danych(HTML) 194 Page - STMicroelectronics |
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194 / 245 page ![]() Core peripherals PM0214 194/245 DocID022708 Rev 4 4.3.1 Accessing the Cortex-M4 NVIC registers using CMSIS CMSIS functions enable software portability between different Cortex-M profile processors. To access the NVIC registers when using CMSIS, use the following functions: Table 46. CMSIS access NVIC functions CMSIS function(1) 1. The input parameter IRQn is the IRQ number, Description void NVIC_EnableIRQ(IRQn_Type IRQn) Enables an interrupt or exception. void NVIC_DisableIRQ(IRQn_Type IRQn) Disables an interrupt or exception. void NVIC_SetPendingIRQ(IRQn_Type IRQn) Sets the pending status of interrupt or exception to 1. void NVIC_ClearPendingIRQ(IRQn_Type IRQn) Clears the pending status of interrupt or exception to 0. uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) Reads the pending status of interrupt or exception. This function returns non- zero value if the pending status is set to 1. void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) Sets the priority of an interrupt or exception with configurable priority level to 1. uint32_t NVIC_GetPriority(IRQn_Type IRQn) Reads the priority of an interrupt or exception with configurable priority level. This function return the current priority level. |
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