LTC4218_15 datasheet(13/18 Pages) LINER

13 / 18 page

LTC4218

4218fg

For more information www.linear.com/LTC4218

applications inForMation

In this same figure the OV threshold is lowered from

15.05V to 13.5V. Decreasing the OV threshold requires

adding a resistor between VDD and OV. This resistor can

be calculated as follows:

RSHUNT2 =

R IN

( ) • VOLD

V TH

( )

VNEW – VOV TH

( )

(

)

VOLD – VNEW

(

)













 =

18k • 15.05

1.235

13.5 – 1.235

(

)

15.05 – 13.5

(

)











=1.736M

Use the equation for RSHUNT1 for increasing the OV and

FB thresholds. Likewise, use the equation for RSHUNT2 for

decreasing the UV and FB thresholds.

Design Example

Consider the following design example (Figure 5): VIN =

12V, IMAX = 7.5A. IINRUSH = 1A, CL = 330µF, VUVON = 9.88V,

VOVOFF = 15.05V, VPWRGD = 10.5V. A current limit fault trig-

gers an automatic restart of the power up sequence.

The selection of the sense resistor, (RS), is set by the

overcurrent threshold of 15mV:

RS = 15mV/IMAX = 15mV/7.5A = 0.002Ω

The MOSFET should be sized to handle the power dissi-

pation during the inrush charging of the output capacitor

COUT. The method used to determine the power in Q1 is

the principal:

EC = Energy in CL = Energy in Q1

Thus:

EC = ½ CV2 = ½ (330µF)(12)2 = 0.024J

Calculate the time it takes to charge up COUT:

tCHARGUP =

CL • VIN

IINRUSH

330µF • 12V

= 4ms

The inrush current is set to 1A using CGATE:

CGATE = CL

IGATE(UP)

IINRUSH

= 330µF

24µA

≅ 0.01µF

The average power dissipated in the MOSFET:

PDISS = EC/tCHARGUP = 0.024J/4ms = 6W

The SOA (safe operating area) curves of candidate MOS-

FETs must be evaluated to ensure that the heat capacity

of the package can stand 6W for 4ms. The SOA curves of

the Vishay Siliconix Si7108DN provide 1.5A at 10V (15W)

for 100ms, satisfying the requirement.

Figure 5. 6A, 12V Card Resident Application

12V

0.1µF

ADC

0.1µF

20k

4218 F05

10k

330µF

SENSE– GATE

SENSE+

VDD

SOURCE

GND

IMON

LTC4218DHC-12

INTVCC

TIMER

FLT

Si7108DN

12V

VOUT

12V

RGATE

CGATE

0.01µF

LTC4218 Arkusz danych(PDF) 13 Page - Linear Technology

LTC4218 Arkusz danych(HTML) 13 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Arkusz danych Pobierz

Link URL