6

LTC1642

APPLICATIO S I FOR ATIO

up; this “foldback” limiting tends to keep the power

dissipation in the N-channel pass transistor constant. The

output voltage is sensed at the FB pin. The limiting sense

resistor voltage is 23mV when FB is grounded, but in-

creases gradually to 53mV when FB exceeds 1V; Figure 3

shows the full dependence.

When the sense resistor voltage reaches its limit, a circuit

breaker timer starts. This timer uses the BRK TMR pin and

has a 1.23V threshold. If BRK TMR reaches 1.23V the

timer comparator trips, tripping the circuit breaker; if the

sense resistor voltage falls below its limit before the

comparator trips the GATE voltage begins ramping back

up immediately. The ramp time

∆t needed to trip the

comparator is

∆t(ms) = 62•C(µF), where C is the external

capacitance.

Once the circuit breaker trips, GATE and FAULT remain at

ground until the chip is restarted. To restart, hold the ON

pin low for at least 2

µs and FAULT will go high. Then take

ON high again and the GATE will ramp up after a system

timing cycle. Or, configure the LTC1642 to restart itself

after the circuit breaker trips by connecting FAULT to the

ON pin.

The servo loop controlling Q1 during current limit has a

unity-gain frequency of about 125kHz; in Figure 1 R4,

together with C2, provide compensation. To ensure stabil-

ity the product 1/(2•

π•R4•C2) should be kept below the

unity-gain frequency, and C2 should be more than Q1’s

gate-source capacitance. The values shown in Figure 1,

0.047

µF and 330Ω, are a starting point.

Typical waveforms during a load short to ground are

shown in Figure 4. The load is shorted to ground at time 1.

The GATE voltage drops until the load current equals its

maximum limit, and the circuit breaker timer starts. The

short is cleared at time 2, before the timer trips. The BRK

TMR pin returns to ground, and the GATE voltage begins

ramping up. At time 3 the load is shorted again and at time

4 the timer trips, pulling the GATE to ground and asserting

FAULT. Although the short is cleared at time 5, FAULT

doesn’t go high until the ON pin is pulled low at time 6. At

time 7 ON goes high and the system timer starts. When it

trips at time 8 the GATE voltage begins ramping.

FB PIN VOLTAGE (mV)

0 100 200 300 400 500 600 700 800 900 1000

1642 F03

70

60

50

40

30

20

10

0

Figure 3. Maximum Sense Resistor Voltage vs FB Voltage

GATE

1.23V

6

7

5

4

3

2

1

8

GATE

BRK TMR

RST TMR

ON

0A

1.23V

1642 F04

FAULT

Figure 4. Current Limit and Circuit Breaker Timing