LTC1647-3IGN datasheet(12/20 Pages) LINER

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LTC1647-1/LTC1647-2/LTC1647-3

pulls the ON pin up. C3 delays GATE turn-on until the

voltage at the ON pin exceeds VIH. The delay time is

tDELAY = –R3•C3•ln[1–(VIH – VOL)/(VON – VOL)]

GATE ramps up at 10

µA/C1 until Q1 conducts. If VOUT is

still shorted to GND, the cycle repeats. The ramp interval

is about tRAMP = VTH•C1/10µA where VTH is the threshold

voltage of the external MOSFET.

Hot Circuit Insertion

When circuit boards are inserted into a live backplane or

a device bay, the supply bypass capacitors on the board

can draw huge transient currents from the backplane or

the device bay power bus as they charge up. The transient

currents can damage the connector pins and glitch the

system supply, causing other boards in the system to

reset or malfunction.

The LTC1647 is designed to turn two positive supplies on

and off in a controlled manner, allowing boards to be safely

inserted or removed from a live backplane or device bay.

The LTC1647 can be located before or after the connector

as shown in Figure 8. A staggered PCB connector can

sequence pin conections when plugging and unplugging

circuit boards. Alternatively, the control signal can be

generated by processor control.

Ringing

Good engineering practice calls for bypassing the supply

rail of any circuit. Bypass capacitors are often placed at the

supply connection of every active device, in addition to one

or more large value bulk bypass capacitors per supply rail.

If power is connected abruptly, the bypass capacitors slow

the rate of rise of voltage and heavily damp any parasitic

resonance of lead or trace inductance working against the

supply bypass capacitors.

The opposite is true for LTC1647 Hot Swap circuits on a

daughterboard. In most cases, on the powered side of the

MOSFET switch (VCC) there is no supply bypass capacitor

present. An abrupt connection, produced by plugging a

board into a backplane connector, results in a fast rising

edge applied to the VCC line of the LTC1647.

No bulk capacitance is present to slow the rate of rise and

heavily damp the parasitic resonance. Instead, the fast

edge shock excites a resonant circuit formed by a combi-

nation of wiring harness, backplane and circuit board

parasitic inductances and MOSFET capacitance. In theory,

the peak voltage should rise to 2X the input supply, but in

practice the peak can reach 2.5X, owing to the effects of

voltage dependent MOSFET capacitance.

The absolute maximum VCC potential for the LTC1647 is

17V; any circuit with an input of more than 6.8V should be

scrutinized for ringing. A well-bypassed backplane should

not escape suspicion: circuit board trace inductances of as

little as 10nH can produce sufficient ringing to overvoltage

VCC.

Check ringing with a fast storage oscilloscope (such as a

LECROY 9314AL DSO) by attaching coax or a probe to VCC

and GND, then repeatedly inserting the circuit board into

the backplane. Figures 9a and 9b show typical results in a

12V application with different VCC lead lengths. The peak

amplitude reaches 22V, breaking down the ESD protection

diode in the process.

There are two methods for eliminating ringing: clipping

and snubbing. A transient voltage suppressor is an effec-

tive means of limiting peak voltage to a safe level.

Figure 10 shows the effect of adding an ON Semiconduc-

tor, 1SMA12CAT3, on the waveform of Figure 9.

Figures 11a and 11b show the effects of snubbing with

different RC networks. The capacitor value is chosen as

10X to 100X the MOSFET COSS under bias and R is

selected for best damping—1

Ω to 50Ω depending on the

value of parasitic inductance.

Supply Glitching

LTC1647 Hot Swap circuits on the backplane are generally

used to provide power-up/down sequence at insertion/

removal as well as overload/short-circuit protection. If a

short-circuit occurs at supply ramp-up, the circuit breaker

trips. The partially enhanced MOSFET, Q1, is easily dis-

connected without any supply glitch.

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