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PIC17C752-08/CL Arkusz danych(PDF) 28 Page - Microchip Technology |
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PIC17C752-08/CL Arkusz danych(HTML) 28 Page - Microchip Technology |
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28 / 328 page ![]() PIC17C7XX DS30289A-page 28 © 1998 Microchip Technology Inc. Bank 7 PW3DCL 10h xx0- ---- uu0- ---- uuu- ---- PW3DCH 11h xxxx xxxx uuuu uuuu uuuu uuuu CA3L 12h xxxx xxxx uuuu uuuu uuuu uuuu CA3H 13h xxxx xxxx uuuu uuuu uuuu uuuu CA4L 14h xxxx xxxx uuuu uuuu uuuu uuuu CA4H 15h xxxx xxxx uuuu uuuu uuuu uuuu TCON3 16h -000 0000 -000 0000 -uuu uuuu Unimplemented 17h ---- ---- ---- ---- ---- ---- Bank 8 DDRH 10h 1111 1111 1111 1111 uuuu uuuu PORTH (4) 11h xxxx xxxx uuuu uuuu uuuu uuuu DDRJ 12h 1111 1111 1111 1111 uuuu uuuu PORTJ (4) 13h xxxx xxxx uuuu uuuu uuuu uuuu Unbanked PRODL 18h xxxx xxxx uuuu uuuu uuuu uuuu PRODH 19h xxxx xxxx uuuu uuuu uuuu uuuu TABLE 5-4: INITIALIZATION CONDITIONS FOR SPECIAL FUNCTION REGISTERS (Cont.’d) Register Address Power-on Reset Brown-out Reset MCLR Reset WDT Reset Wake-up from SLEEP through interrupt Legend: u = unchanged, x = unknown, - = unimplemented read as '0', q = value depends on condition. Note 1: One or more bits in INTSTA, PIR1, PIR2 will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GLINTD bit is cleared, the PC is loaded with the interrupt vector. 3: See Table 5-3 for reset value of specific condition. 4: This is the value that will be in the port output latch. 5: When the device is configured for microprocessor or externded microcontroller mode, the operation of this port does not rely on these registers 6: On any device reset, these pins are configured as inputs. |
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