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LC79451KB Arkusz danych(PDF) 27 Page - ON Semiconductor

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LC79451KB Arkusz danych(HTML) 27 Page - ON Semiconductor

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No.A2223-27/38
(4) Control Register 4 (Waveform Generation and RESET Detection)
Address : F3
D7
D6
D5
D4
D3
D2
D1
D0
*
*
*
*
*
*
STERR
START
*
*
*
*
*
*
(1)
(0)
*: Non use ( ) default
1) START
⋅⋅⋅ Waveform output signal
0 : Waveform is not output. Data do not shift.
1 : Waveform is output. Data shift.
START Flag is automatically canceled with finish of waveform output.
2) STERR
⋅⋅⋅ RESET detection signal
You can detect reset outbreak by set “0” after RESET = H, and reading a register or
monitoring DAOUT.
0 : No outbreak of reset.
1 : Outbreak of reset.



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