SIO1007 datasheet(65/108 Pages) MICROCHIP

65 / 108 page

 2005 - 2015 Microchip Technology Inc.

DS00002020A-page 65

SIO1007

18.4.14

CR0D

CR0D can only be accessed in the configuration state and after the CSR has been initialized to 0DH. This register is

read only. CR0D contains the SIO1007 Device ID. The default value of this register after power up is 0x20 on VCC POR.

18.4.15

CR0E

CR0E can only be accessed in the configuration state and after the CSR has been initialized to 0EH. This register is

read only. CR0E contains the current SIO1007 Chip. Revision Level starting at 00H.

18.4.16

CR0F

CR0F can only be accessed in the configuration state and after the CSR has been initialized to 0FH. CR0F is a test

control register and all bits must be treated as Reserved.

18.4.17

CR10

CR10 can only be accessed in the configuration state and after the CSR has been initialized to 10H. CR10 is a test

control register and all bits must be treated as Reserved.

Note:

All test modes are reserved for Microchip use. Activating test mode registers may produce undesired

results.

TABLE 18-12: CR0F

Test 1

Type: R/W

Default: 0X00 ON VCC POR

BIT NO.

BIT NAME

DESCRIPTION

0Test 0

RESERVED FOR MICROCHIP USE

1Test 1

2Test 2

3Test 3

4Test 4

5Test 5

6Test 6

7Test 7

Note:

All test modes are reserved for Microchip use. Activating test mode registers may produce undesired

results.

TABLE 18-13: CR10

Test 2

Type: R/W

Default: 0X00 ON VCC POR

BIT NO.

BIT NAME

DESCRIPTION

0Test 8

RESERVED FOR MICROCHIP USE

1Test 9

Test 10

3Test 11

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