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STGIPN3H60AT Arkusz danych(PDF) 14 Page - STMicroelectronics

Numer części STGIPN3H60AT
Szczegółowy opis  SLLIMM™nano (small low-loss intelligent molded module) IPM, 3 A - 600 V 3-phase IGBT inverter bridge
PDF  19 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

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Application information
STGIPN3H60AT
14/19
DocID026945 Rev 1
4.1
Recommendations
Input signals HIN, LIN are active-high logic. A 500 k
Ω (typ.) pull-down resistor is built-in
for each input. To prevent input signal oscillation, the wiring of each input should be as
short as possible and the use of RC filters (R1, C1) on each input signal is suggested.
The filters should be done with a time constant of about 100ns and must be placed as
close as possible to the IPM input pins.
The bypass capacitor Cvcc (aluminum or tantalum) is recommended to reduce the
transient circuit demand on the power supply. In addition, a decoupling capacitor C2
(from 100 to 220 nF, ceramic with low ESR) is suggested, to reduce high frequency
switching noise distributed on the power supply lines. It must be placed as close as
possible to each Vcc pin and in parallel to the bypass capacitor.
The use of RC filter (RSF, CSF) for current monitoring is recommended to improve
noise immunity. The filter must be placed as close as possible to the microcontroller or
to the Op-amp.
The decoupling capacitor C3 (from 100 to 220 nF, ceramic with low ESR), in parallel to
each Cboot, is recommended in order to filter high frequency disturbances.
The Zener diodes DZ1 between the Vcc pins and GND and in parallel to each Cboot is
suggested in order to prevent overvoltage.
The decoupling capacitor C4 (from 100 to 220 nF, ceramic with low ESR) in parallel to
the electrolytic capacitor Cvdc is recommended, in order to prevent surge destruction.
Both capacitors C4 and Cvdc should be placed as close as possible to the IPM (C4 has
priority over Cvdc).
By integrating an application-specific type HVIC inside the module, direct coupling to
the MCU terminals without an opto-coupler is possible.
Low inductance shunt resistors should be used for phase leg current sensing
In order to avoid malfunctions, the wiring between N pins, the shunt resistor and
PWR_GND should be as short as possible.
It is recommended to connect SGN_GND to PWR_GND at only one point (near the
terminal of shunt resistor), in order to avoid any malfunction due to power ground
fluctuation.
Note:
For further details refer to AN4043.
Table 12. Recommended operating conditions
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
VPN
Supply voltage
Applied between P-Nu, Nv,
Nw
300
500
V
VCC
Control supply voltage
Applied between VCC-
GND
12
15
17
V
VBS
High side bias voltage
Applied between VBOOTi-
OUTi for i = U, V, W
11.5
17
V
tdead
Blanking time to prevent
Arm-short
For each input signal
1.5
µs
fPWM
PWM input signal
-40°C < Tc < 100°C
-40°C < Tj < 125°C
25
kHz
TC
Case operation temperature
100
°C



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