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SPEAR320S Arkusz danych(PDF) 80 Page - STMicroelectronics |
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SPEAR320S Arkusz danych(HTML) 80 Page - STMicroelectronics |
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80 / 113 page ![]() Timing requirements SPEAr320S 80/113 Doc ID 022508 Rev 2 5.4 CLCD timing characteristics The CLCD has a wide variety of configurations, and the parameters change accordingly. The timing characterization is performed assuming an output load capacitance of 10 pF on all outputs. Figure 9. CLCD waveform Table 52. CLCD timing requirements Symbol Description Min Max Unit tCK CLCP clock period 20.83 41.66 ns tD CLCP to CLCD output data delay 1 9.5 tCK tD CLD[23:0], CLAC, CLLE, CLLP, CLFP, CLPOWER CLCP |
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