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ACE25C200G Arkusz danych(PDF) 29 Page - ACE Technology Co., LTD.

Numer części ACE25C200G
Szczegółowy opis  2M BIT SPI NOR FLASH
PDF  48 Pages
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Producent  ACE [ACE Technology Co., LTD.]
Strona internetowa  http://www.ace-ele.com
Logo ACE - ACE Technology Co., LTD.

ACE25C200G Arkusz danych(HTML) 29 Page - ACE Technology Co., LTD.

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ACE25C200G
2M BIT SPI NOR FLASH
VER 1.1
29
Release from Deep Power-Down/Read Device ID (ABH)
The Release from Power-Down or Device ID instruction is a multi-purpose instruction. It can be
used to release the device from the Power-Down state or obtain the devices electronic identification
(ID) number.
See Figure 20 , to release the device from the Power-Down state, the instruction is issued by
driving the /CS pin low, shifting the instruction code “ABH” and driving /CS high Release from
Power-Down will take the time duration of tRES1 (See AC Characteristics) before the device will
resume normal operation and other instruction are accepted. The /CS pin must remain high during the
tRES1 time duration.
When used only to obtain the Device ID while not in the Power-Down state, the instruction is
initiated by driving the /CS pin low and shifting the instruction code “ABH” followed by 3-dummy byte.
The Device ID bits are then shifted out on the falling edge of SCLK with most significant bit (MSB) first
as shown in See Figure 21 The Device ID value for the
ACE25C200G is listed in Manufacturer and
Device Identification table. The Device ID can be read continuously. The instruction is completed by
driving /CS high.
When used to release the device from the Power-Down state and obtain the Device ID, the
instruction is the same as previously described, and shown in See Figure 21, except that after /CS is
driven high it must remain high for a time duration of tRES2 (See AC Characteristics). After this time
duration the device will resume normal operation and other instruction will be accepted. If the Release
from Power-Down/Device ID instruction is issued while an Erase, Program or Write cycle is in process
(when WIP equal 1) the instruction is ignored and will not have any effects on the current cycle.
Figure 20 Release Power-Down Sequence Diagram
Figure 20
Figure 21 Release Power-Down/Read Device ID Sequence Diagram
Figure 21



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