PIC16F877ATISLASHML datasheet(45/234 Pages) MICROCHIP

45 / 234 page

 2003 Microchip Technology Inc.

DS39582B-page 43

PIC16F87XA

TABLE 4-1:

PORTA FUNCTIONS

TABLE 4-2:

SUMMARY OF REGISTERS ASSOCIATED WITH PORTA

Name

Bit#

Buffer

Function

RA0/AN0

bit 0

TTL

Input/output or analog input.

RA1/AN1

bit 1

TTL

Input/output or analog input.

RA2/AN2/VREF-/CVREF

bit 2

TTL

Input/output or analog input or VREF- or CVREF.

RA3/AN3/VREF+

bit 3

TTL

Input/output or analog input or VREF+.

RA4/T0CKI/C1OUT

bit 4

Input/output or external clock input for Timer0 or comparator output.

Output is open-drain type.

RA5/AN4/SS/C2OUT

bit 5

TTL

Input/output or analog input or slave select input for synchronous serial

port or comparator output.

Legend: TTL = TTL input, ST = Schmitt Trigger input

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on:

POR, BOR

Value on

all other

Resets

05h

PORTA

—

RA5

RA4

RA3

RA2

RA1

RA0

--0x 0000

--0u 0000

85h

TRISA

—

PORTA Data Direction Register

--11 1111

9Ch

CMCON

C2OUT

C1OUT

C2INV

C1INV

CIS

CM2

CM1

CM0

0000 0111

9Dh

CVRCON

CVREN

CVROE

CVRR

—

CVR3

CVR2

CVR1

CVR0

000- 0000

9Fh

ADCON1

ADFM

ADCS2

—

PCFG3

PCFG2

PCFG1

PCFG0

00-- 0000

Legend:

= unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA.

Note:

When using the SSP module in SPI Slave mode and SS enabled, the A/D converter must be set to one of

the following modes, where PCFG3:PCFG0 = 0100, 0101, 011x, 1101, 1110, 1111.

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