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PCI9060ES Arkusz danych(PDF) 60 Page - List of Unclassifed Manufacturers

Numer części PCI9060ES
Szczegółowy opis  12O COMPATIBLE PCI BUS MASTER INTERFACE CHIP FOR ADAPTERS AND EMBEDDED SYSTEMS
PDF  192 Pages
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PCI9060ES Arkusz danych(HTML) 60 Page - List of Unclassifed Manufacturers

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SECTION 4
PCI 9080
REGISTERS
©PLX Technology, Inc., 1997
Page 51
Version 1.02
4.2.2 Local Configuration Registers
Table 4-6. Local Configuration Registers
PCI
(Offset
from
Base
Address)
Local
Access
(Offset
from Chip
Select
Address)
To ensure software compatibility with other versions of the PCI 9080 family and to
ensure compatibility with future enhancements,
write a zero to all unused bits.
31
0
PCI/Local
Writable
Serial
EEPROM
Writable
00h
80h
Range for PCI to Local Address Space 0
Y
Y
04h
84h
Local Base Address (Remap) for PCI to Local Address Space 0
Y
Y
08h
88h
Mode/Arbitration Register
Y
Y
0Ch
8Ch
Big/Little Endian Descriptor Register
Y
Y
10h
90h
Range for PCI to Local Expansion ROM
Y
Y
14h
94h
Local Base Address (Remap) for PCI to Local Expansion ROM and BREQo control
Y
Y
18h
98h
Local Bus Region Descriptors
(Space 0 and Expansion ROM) for PCI to Local Accesses
YY
1Ch
9Ch
Range for Direct Master to PCI
Y
Y
20h
A0h
Local Base Address for Direct Master to PCI Memory
Y
Y
24h
A4h
Local Base Address for Direct Master to PCI IO/CFG
Y
Y
28h
A8h
PCI Base Address (Remap) for Direct Master to PCI
Y
Y
2Ch
ACh
PCI Configuration Address Register for Direct Master to PCI IO/CFG
Y
Y
F0h
170h
Range for PCI to Local Address Space 1
Y
Y
F4h
174h
Local Base Address (Remap) for PCI to Local Address Space 1
Y
Y
F8h
178h
Local Bus Region Descriptor (Space 1) for PCI to Local Accesses
Y
Y



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