PCI9060ES datasheet(85/192 Pages) ETC

85 / 192 page

SECTION 4

PCI 9080

REGISTERS

©PLX Technology, Inc., 1997

Page 76

Version 1.02

4.5.12 (CNTRL; PCI:6Ch, LOC:ECh) Serial EEPROM Control, PCI Command Codes, User I/O

Control, Init Control Register

Table 4-59. (CNTRL; PCI:6Ch, LOC:ECh) Serial EEPROM Control, PCI Command Codes, User I/O Control, Init

Control Register

Field

Description

Read

Write

Value after Reset

3:0

PCI Read Command Code for DMA. This PCI command is sent out during DMA

read cycles.

Yes

1110

7:4

PCI Write Command Code for DMA. This PCI command is sent out during DMA

write cycles.

Yes

0111

11:8

PCI Memory Read Command Code for Direct Master. This PCI command is sent

out during Direct Master read cycles.

Yes

0110

15:12

PCI Memory Write Command Code for Direct Master. This PCI command is sent

out during Direct Master write cycles.

Yes

0111

General Purpose Output. Value of 1 causes USERO output to go high. Value of 0

causes USER0 output to go low.

Yes

General Purpose Input. Value of 1 indicates USERI input pin is high. Value of 0

indicates USERI pin is low.

Yes

—

23:18

Reserved.

Yes

Serial EEPROM Clock for Local or PCI Bus Reads or Writes to serial EEPROM.

Toggling this bit generates a serial EEPROM clock. (Refer to the manufacturer’s

data sheet for the particular serial EEPROM being used.)

Yes

Serial EEPROM Chip Select. For local or PCI bus reads or writes to serial

EEPROM, setting this bit to 1 provides the serial EEPROM chip select.

Yes

Write Bit to serial EEPROM. For writes, this output bit is the input to the serial

EEPROM. Clocked into the serial EEPROM by the serial EEPROM clock.

Yes

Read serial EEPROM Data Bit. For reads, this input bit is the output of the serial

EEPROM. Clocked out of the serial EEPROM by the serial EEPROM clock.

Yes

—

Serial EEPROM Present. Value of 1 indicates a serial EEPROM is present.

Yes

Reload Configuration Registers. When this bit is set to 0, writing a 1 causes PCI

9080 to reload the local configuration registers from serial EEPROM.

Yes

PCI Adapter Software Reset. Value of 1 holds the local bus logic in the PCI 9080

reset and LRESETo# asserted. The contents of the PCI configuration registers and

Shared Run Time registers will not be reset. Software Reset can only be cleared

from the PCI bus. (Local bus remains reset until this bit is cleared.)

Yes

Local Init Status. Value of 1 indicates Local Init done. Responses to PCI accesses

are RETRYs until this bit is set. While input pin NB# is asserted low, this bit is

forced to 1.

Yes

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