REV. B

AD1981B

–16–

RIM[3:0]

Right Input Mixer Gain Control. Each LSB represents 1.5 dB, 0000 = 0 dB, and the gain range is 0 dB to 22.5 dB.

RM

Right Channel Mute. Once enabled by the MSPLT bit in Register 76h, this bit mutes the right channel separately

from the IM bit. Otherwise, this bit will always read 0 and will have no affect when set to 1.

LIM[3:0]

Left Input Mixer Gain Control. Each LSB represents 1.5 dB, 0000 = 0 dB, and the gain range is 0 dB to 22.5 dB.

IM

Input Mute. When this bit is set to 1, both the left and right channels are muted, unless the MSPLT bit in

Register 76h is set to 1, in which case this mute bit will affect only the left channel.

Table VI. Settings for Record Gain Register

Control Bits

Reg. 76h

Record Gain (1Ch)

Left Channel Input Mixer D[11:8]

Right Channel Input Mixer D[3:0]

MSPLT

*

D15 WRITE

READBACK

Function

D7

*

WRITE

READBACK

Function

00

1111

1111

22.5 dB Gain

x

1111

1111

22.5 dB Gain

00

0000

0000

0 dB Gain

x

0000

0000

0 dB Gain

01

xxxx

xxxx

–

dB Gain, Muted

x

xxxx

xxxx

–

dB Gain, Muted

10

1111

1111

22.5 dB Gain

1

xxxx

xxxx

–

dB Gain,

Right Only Muted

11

xxxx

xxxx

–

dB Gain,

0

1111

1111

22.5 dB Gain

Left Only Muted

11

xxxx

xxxx

–

dB Gain,

1

xxxx

xxxx

–

dB Gain, Right Muted

Left Muted

*For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 76h. The MSPLT bit enables separate mute bits for the left and right

channels. If MSPLT is not set, RM bit has no effect.

x is a wild card and has no effect on the value.

LPBK

Loopback Control. ADC/DAC Digital Loopback Mode.

0 = No Loopback (Default).

1 = Loopback PCM Digital Data from ADC Output to DAC.

MS

MIC Select. Selects mono MIC input.

0 = Select MIC1.

1 = Select MIC2.

See 2CMIC bit in Register 76h to enable stereo microphone recording.

MIX

Mono Output Select. Selects mono output audio source.

0 = Mixer mono output (reset default).

1 = MIC1 channel.

General-Purpose Register (Index 20h)

Reg

No.

Name

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

20h

General-Purpose

X

X

X

X

X

X

MIX

MS

LPBK

X

X

X

X

X

X

X

0000h

This register should be read before writing to generate a mask for only the bit(s) that need to be changed. All registers not shown and bits containing an X are assumed

to be reserved.

Record Gain Register (Index 1Ch)

Reg

No. Name

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

1Ch Record Gain

IM

X

X

X

LIM3

LIM2

LIM1

LIM0

RM

* XX

X

RIM3

RIM2

RIM1

RIM0 8000h

*For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 76h. The MSPLT bit enables separate mute bits for the left and right

channels. If MSPLT is not set, RM bit has no effect. All registers not shown and bits containing an X are assumed to be reserved. Refer to Table VI for examples.