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AD1980 Arkusz danych(PDF) 13 Page - Analog Devices |
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AD1980 Arkusz danych(HTML) 13 Page - Analog Devices |
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13 / 32 page ![]() REV. 0 AD1980 –13– CD Volume Register (Index 12h) Reg No. Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default 12h CD Volume CVM X X LCV4 LCV3 LCV2 LCV1 LCV0 CDRM * XX RCV4 RCV3 RCV2 RCV1 RCV0 8808h *For AC ’97 compatibility, Bit D7 is available only by setting the MSPLT bit, Register 76h. The MSPLT bit enables separate mute bits for the left and right channels. If MSPLT is not set, the Bit D7 has no effect. All registers not shown and bits containing an X are assumed to be reserved. Refer to Table IV for examples. Line-In Volume Register (Index 10h) Reg No. Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default 10h Line-In Volume LVM X X LLV4 LLV3 LLV2 LLV1 LLV0 LVRM * XX RLV4 RLV3 RLV2 RLV1 RLV0 8808h *For AC ’97 compatibility, Bit D7 is available only by setting the MSPLT bit, Register 76h. The MSPLT bit enables separate mute bits for the left and right channels. If MSPLT is not set, the Bit D7 has no effect. All registers not shown and bits containing an X are assumed to be reserved. Refer to Table IV for examples. RLV[4:0] Right Line-In Volume. Allows setting the Line-In Right channel attenuator in 32 volume levels with 31 steps of 1.5 dB each. The LSB represents 1.5 dB, and the range is +12 dB to –34.d dB. The default value is 0 dB, mute enabled. RM Right Channel Mute. Once enabled by the MSPLT bit in Register 76h, this bit mutes the right channel separately from the LIM bit. Otherwise, this bit will always read “0” and will have no effect when set to “1.” LLV[4:0] Left Line-In Volume. Allows setting the Line-In left channel attenuator in 32 volume levels with 31 steps of 1.5 dB each. The LSB represents 1.5 dB, and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled. LVM Line-In Mute. When this bit is set to “1,” both the left and the right channels are muted, unless the MSPLT bit in Register 76h is set to “1,” in which case this mute bit will only affect the left channel. RCV[4:0] Right CD Volume. Allows setting the CD right channel attenuator in 32 volume levels with 31 steps of 1.5 dB each. The LSB represents 1.5 dB, and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled. RM Right Channel Mute. Once enabled by the MSPLT bit in Register 76h, this bit mutes the Right channel separately from the CVM bit. Otherwise this bit will always read “0” and will have no effect when set to “1.” LCV[4:0] Left CD Volume. Allows setting the CD left channel attenuator in 32 volume levels with 31 steps of 1.5 dB each. The LSB represents 1.5 dB, and the range is +12 dB to –24.5 dB. The default value is 0 dB, mute enabled. CVM CD Volume Mute. When this bit is set to “1,” both the left and the right channels are muted, unless the MSPLT bit in Register 76h is set to “1,” in which case this mute bit will affect only the left channel. RAV[4:0] Right AUX Volume. Allows setting the AUX right channel attenuator in 32 volume levels with 31 steps of 1.5 dB each. The LSB represents 1.5 dB, and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled. RM Right Channel Mute. Once enabled by the MSPLT bit in Register 76h, this bit mutes the right channel separately from the AVM bit. Otherwise, this bit will always read “0” and will have no affect when set to “1.” LAV[4:0] Left PCM Out Volume. Allows setting the PCM left channel attenuator in 32 volume levels. The LSB represents 1.5 dB, and the range is +12 dB to –34.5 dB. The default value is 0 dB, mute enabled. AVM PCM Out Volume Mute. When this bit is set to “1,” both the left and the right channels are muted, unless the MSPLT bit in Register 76h is set to “1,” in which case this mute bit will affect only the left channel. AUX Volume Register (Index 16h) Reg No. Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default 16h AUX Volume AVM X X LAV4 LAV3 LAV2 LAV1 LAV0 AVRM * XX RAV4 RAV3 RAV2 RAV1 RAV0 8808h *For AC ’97 compatibility, Bit D7 is only available by setting the MSPLT bit, Register 76h. The MSPLT bit enables separate mute bits for the left and right channels. If MSPLT is not set, Bit D7 has no effect. All registers not shown and bits containing an X are assumed to be reserved. Refer to Table IV for examples. |
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