LPC2292 datasheet(7/40 Pages) PHILIPS

7 / 40 page

Philips Semiconductors

LPC2292/LPC2294

16/32-bit ARM microcontrollers with external memory interface

Preliminary data

Rev. 01 — 05 February 2004

7 of 40

9397 750 12748

P0.27

AIN0 — A/D converter, input 0. This analog input is always connected to its

pin.

CAP0.1 — Capture input for Timer0, channel 1.

MAT0.1 — Match output for Timer0, channel 1.

P0.28

AIN1 — A/D converter, input 1. This analog input is always connected to its

pin.

CAP0.2 — Capture input for Timer0, channel 2.

MAT0.2 — Match output for Timer0, channel 2.

P0.29

AIN2 — A/D converter, input 2. This analog input is always connected to its

pin.

CAP0.3 — Capture input for Timer0, Channel 3.

MAT0.3 — Match output for Timer0, channel 3.

P0.30

AIN3 — A/D converter, input 3. This analog input is always connected to its

pin.

EINT3 — External interrupt 3 input.

CAP0.0 — Capture input for Timer0, channel 0.

P1.0 to P1.31

91, 90, 34,

24, 15, 7,

102, 95, 86,

82, 70, 60,

52, 144, 140,

126, 113, 43

I/O

Port 1: Port 1 is a 32-bit bi-directional I/O port with individual direction

controls for each bit. The operation of port 1 pins depends upon the pin

function selected via the Pin Connect Block.

Pins 2 through 15 of port 1 are not available.

P1.0

CS0 — Low-active Chip Select 0 signal.

(Bank 0 addresses range 8000 0000 - 80FF FFFF)

P1.1

OE — Low-active Output Enable signal.

P1.16

TRACEPKT0 — Trace Packet, bit 0. Standard I/O port with internal pull-up.

P1.17

TRACEPKT1 — Trace Packet, bit 1. Standard I/O port with internal pull-up.

P1.18

TRACEPKT2 — Trace Packet, bit 2. Standard I/O port with internal pull-up.

P1.19

TRACEPKT3 — Trace Packet, bit 3. Standard I/O port with internal pull-up.

P1.20

102

TRACESYNC — Trace Synchronization. Standard I/O port with internal

pull-up.

Note: LOW on this pin while RESET is LOW, enables pins P1.25:16 to

operate as Trace port after reset.

P1.21

PIPESTAT0 — Pipeline Status, bit 0. Standard I/O port with internal pull-up.

P1.22

PIPESTAT1 — Pipeline Status, bit 1. Standard I/O port with internal pull-up.

P1.23

PIPESTAT2 — Pipeline Status, bit 2. Standard I/O port with internal pull-up.

P1.24

TRACECLK — Trace Clock. Standard I/O port with internal pull-up.

P1.25

EXTIN0 — External Trigger Input. Standard I/O with internal pull-up.

P1.26

I/O

RTCK — Returned Test Clock output. Extra signal added to the JTAG port.

Assists debugger synchronization when processor frequency varies.

Bi-directional pin with internal pull-up.

Note: LOW on this pin while RESET is LOW, enables pins P1.31:26 to

operate as Debug port after reset.

P1.27

144

TDO — Test Data out for JTAG interface.

Table 3:

Pin description…continued

Symbol

Type

Description

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