ST92196A datasheet(68/268 Pages) STMICROELECTRONICS

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TIMING AND CLOCK CONTROLLER (TCC)

FREQUENCY MULTIPLIERS (Cont’d)

Off-chip filter components (to be confirmed)

– Core frequency multiplier (FCPU pin) : 1.2K

ohms; 47 nF plus 100 pF between the FCPU pin

and GND.

– Skew frequency multiplier (FOSD pin) : 1.2K

ohms; 47 nF plus 100 pF between the FOSD pin

and GND.

The frequency multipliers are off during and upon

exiting from the reset phase. The user must pro-

gram the desired multiplying factor, start the multi-

plier and then wait for its stability (refer to the Elec-

trical Characteristics chapter for the specified de-

lay).

Once the Core/Peripherals multiplier is stabilized,

the Main Clock controller can be re-programmed

through the FMSL bit in the MCCR register to pro-

vide the final frequency (CPUCLK) to the CPU.

The

frequency

multipliers

are

automatically

switched off when the microprocessor enters

HALT mode (the HALT mode forces the control

Table 14. Examples of CPU Speed Choices

Note: 24 MHz is the max. authorized frequency.

Caution: The values indicated in this table are the only

authorized values.

Table 15. PIXCLK Frequency Choices

Crystal Frequency

FML

(3:0)

CPUCLK

SKDIV2=0

4 MHz

10 MHz

12 MHz

14 MHz

16 MHz

18 MHz

20 MHz

22 MHz

24 MHz

Crystal Frequency

SKW

(3:0)

FPIXC

PIXCLK

SKDIV2=0

4 MHz

14 MHz

16 MHz

18 MHz

20 MHz

22 MHz

24 MHz

28 MHz

32 MHz

36 MHz

40 MHz

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