ST92196A datasheet(51/268 Pages) STMICROELECTRONICS

51 / 268 page

51/268

INTERRUPTS

3.6 EXTERNAL INTERRUPTS

The standard ST9 core contains 8 external inter-

rupts sources grouped into four pairs.

Table 11. External Interrupt Channel Grouping

Each source has a trigger control bit TEA0,..TED1

(R242,EITR.0,..,7 Page 0) to select triggering on

the rising or falling edge of the external pin. If the

Trigger control bit is set to “1”, the corresponding

pending bit IPA0,..,IPD1 (R243,EIPR.0,..,7 Page

0) is set on the input pin rising edge, if it is cleared,

the pending bit is set on the falling edge of the in-

put pin. Each source can be individually masked

through

the

corresponding

control

bit

IMA0,..,IMD1 (EIMR.7,..,0). See Figure 1.

The priority level of the external interrupt sources

can be programmed among the eight priority lev-

els with the control register EIPLR (R245). The pri-

ority level of each pair is software defined using

the bits PRL2, PRL1. For each pair, the even

channel (A0,B0,C0,D0) of the group has the even

priority level and the odd channel (A1,B1,C1,D1)

has the odd (lower) priority level.

Figure 23. Priority Level Examples

Figure 23 shows an example of priority levels.

Figure 1 gives an overview of the External inter-

rupt control bits and vectors.

– The source of the interrupt channel A1 can be

selected between the external pin INT4 (when

INTS = 1) or the on-chip Standard Timer.

– The source of the interrupt channel B0 can be

selected between the external pin INT2 (when

(SPEN,BMS)=(0,0)) or the on-chip SPI peripher-

al.

– The source of the interrupt channel INTB1 can

be selected between the INT3 external pin

(CLEAR=1) or the I2C interrupt (CLEAR=0) by

programming the CLEAR bit in the I2CCTR reg-

ister.

– The source of the interrupt channel INTC0 can

be selected between the INT4 external pin (DI-

ON=OSDE=0) or the Display Controller interrupt

(all other cases) by programming the DION,

OSDE bits in the OSDER register.

– The source of the interrupt channel C1 can be

selected between the external pin INT5 (when

the AD_INT bit in the AD-INT register=0) or the

on-chip ADC (when AD-INT=1).

– The source of the interrupt channel D0 can be

selected between the external pin INT6 (when

the CCID bit in the DS0CR2 or DS1CR2 regis-

ter=1) or the on-chip Data Slicers (when

CCID=0).

– The source of the interrupt channel D1 can be

selected between the external pin INT7 (when

the IRWDIS bit in the IRSC register = 1) or the

on-chip IR (when IRWDIS=0).

Warning: When using channels shared by both

external interrupts and peripherals, special care

must be taken to configure their control registers

for both peripherals and interrupts.

Table 12. Multiplexed Interrupt Sources

External Interrupt

Channel

INT7

INT6

INTD1

INTD0

INT5

INT4

INTC1

INTC0

INT3

INT2

INTB1

INTB0

INT1

INT0

INTA1

INTA0

PL2D PL1D PL2C PL1C PL2B PL1B PL2A PL1A

INT.D1:

INT.C1: 001=1

INT.D0:

SOURCE

PRIORITY

SOURCE

INT.A0: 010=2

INT.A1: 011=3

INT.B1: 101=5

INT.B0: 100=4

INT.C0: 000=0

EIPLR

VR000151

100=4

101=5

Channel

Internal

Interrupt

Source

External

Interrupt

Source

INTA0

Timer/Watch-

dog

INT0

P3.2

INTA1

STIM Timer

INT1

P3.4

INTB0

SPI Interrupt

INT2

P2.4

INTB1

I2C

INT3

P2.2

INTC0

OSD

INT4

P2.3

INTC1

ADC

INT5

P2.7

INTD0

DS0 & DS1

INT6

P2.1

INTD1

INT7

P2.0

ST92196A Arkusz danych(PDF) 51 Page - STMicroelectronics

ST92196A Arkusz danych(HTML) 51 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Arkusz danych Pobierz

Link URL